CDC-50001 - 1-Bit Asynchronous Transfer Not Synchronized

Hi,

May be you can try assignment Synchronizer Identification: Forced to make those registers synchronizer.

Thanks,

Regards,

Sheng

Hi,

May I know any further concern or update?

Thanks,

Regards,

Sheng

I'm checking it and update if it help or not - it will take 1-2 days.

Or.

Hi,

Unfortunately, the issue persists. I am still encountering the CDC50001 failure on the same path. To clarify:

I added the following two global assignments and verified they are set correctly in the GUI:

set_global_assignment -name SYNCHRONIZER_IDENTIFICATION FORCED
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2

Is there any other way to ensure these settings are captured by Quartus?

or next steps for debug the issue ?

Thanks,

Or

Hi Or,

May be try Synchronizer Identification: Forced if asynchronous

Or set_instance_assignment (Synchronizer Identification) straight away to those registers

Thanks,

Regards,

Sheng

Yes, your solution “Forced if asynchronous” solved the issue or at least removed many warnings. I will investigate the two that are left. However, since the entire process was trial and error, could you explain why this last attempt resolved the issue? What does it mean, and how is it different from the other configurations?

In addition to my previous message, I have investigated the two warnings. The first warning pertains to an internal transfer within the memory of the synchronous FIFO, which I can disregard. The second warning is related to an issue similar to what was resolved by the “Forced if asynchronous” solution; however, this instance remains unresolved. As shown in the attached picture, there is a synchronization of 2 bits, as discussed in the original thread, but it is not being ignored this time. Could you provide any insights into why this might be happening?

+---------------------------+---------------------------------------------------+-------------------+-------------------+-----------------------+--------+
; CDC-50001 - 1-Bit Asynchronous Transfer Not Synchronized ;
+---------------------------+---------------------------------------------------+-------------------+-------------------+-----------------------+--------+
; From ; To ; From Clock ; To Clock ; Reason ; Waived ;
+---------------------------+---------------------------------------------------+-------------------+-------------------+-----------------------+--------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------
; evt_dib_ip_i|die_ready_Z ; evt_dib_ip_i|die_ready_sync_i|sync1_in_Z ; pll_clk ; rx_clk (INVERTED) ; Asynchronous transfer ; ;
+---------------------------+---------------------------------------------------+-------------------+-------------------+-----------------------+--------+

Hi,

'Forced if Asynchronous' - the Timing Analyzer identifies synchronization register chains if the software detects an asynchronous signal transfer, even if there is combinational logic or only one register in the chain

Can you try set_instance_assignment (Synchronization Identification) directly to those remaining registers?

Thanks,

Regards,

Sheng

I will check the “set_instance_assignment (Synchronization Identification) directly to those remaining registers” as suggested. However, it seems from your response that we might be overlooking the issue. As I mentioned, there are synchronizers in place, so the software should detect them as such, given that there is no logic between the registers. This raises a concern about a potential bug or design flaw. If the constraints you suggest are merely to clean up the report, I am not particularly concerned about that. My primary goal is to understand whether there is actual synchronization or if the tool is detecting an unsynchronized path.

Hi,

Yes, we might be overlooking the issue. Probably need to look closely into that concern.

Btw, please let me know also whether set_instance_assignment can merely clean up the report?