narenkandou
New Contributor
1 year agoAgilex™ 7 R-Tile Compute Express Link* (CXL*) FPGA
We have been using the Agilex™ 7 R-Tile Compute Express Link* (CXL*) FPGA . We are not seeing any electrical activity on the link adn no traininig is happening . Our assumption is that the bitstream of the FPGA is already present and we should see the link trained on our hosts but that is not happening at the moment . Can you help us find out why there is no activity on the link ?