Occasional Contributor
ContributorWe've all been trying to help you, but you've still not provided sufficient information for us to even guess at the nature of what may be going wrong with your design. It's been all too vague and disjointed.
And I'm sorry to say but your responses regarding the clock and reset also don't give me the impression that you have a strong grasp of those issues.
All that aside, I will echo once more the key question raised by @sstrell and @FvM : Have you verified your design in simulation?
Is your design failing to function as intended in simulation? Or are you seeing a mismatch in how it's functioning in hardware vs. simulation? Or, where and what exactly is it that you're seeing that's going wrong?
And, here and in general, if you've not performed functional verification of your design in simulation, then it's premature to even attempt to go down the hardware implementation flow before having done that.
-Roee
