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Why Vectored Interrupt Controller IRQ -1 ?
Hello Friends i have added Vectored Interrupt Controller and generate the BSP but system.h reflect that VIC IRQ is -1
/* VIC configuration */ #define ALT_MODULE_CLASS_VIC altera_vic #define VIC_BASE 0x11041000 #define VIC_DAISY_CHAIN_ENABLE 0 #define VIC_INTERRUPT_CONTROLLER_ID 0 #define vic_irq -1#define vic_irq_interrupt_controller_id -1 #define VIC_NAME "/dev/VIC" #define VIC_NUMBER_OF_INT_PORTS 8 #define VIC_RIL_WIDTH 4 #define VIC_SPAN 1024 #define VIC_TYPE "altera_vic"
15 Replies
- Altera_Forum
Honored Contributor
That's correct. AFAIK those defines are used for internal interrupt controller
- Altera_Forum
Honored Contributor
thanking you Cris72,
i found that rc = alt_ic_irq_enable(vic_interrupt_controller_id,vic_irq); always return -1, - Altera_Forum
Honored Contributor
The second function parameter must rather be the actual irq you want to be enabled, not VIC_IRQ.
Moreover, did you succeed in registering the interrupt? I mean, did you already call lt_ic_isr_register() without errors? - Altera_Forum
Honored Contributor
--- Quote Start --- The second function parameter must rather be the actual irq you want to be enabled, not VIC_IRQ. Moreover, did you succeed in registering the interrupt? I mean, did you already call lt_ic_isr_register() without errors? --- Quote End --- sorry Cris i didn't get you i mean "actual irq" mean what..? in my understanding VIC will take all the Interrupt and manage them based on priority ...correct me if i am wrong but before that i need to enable alt_ic_irq_enable(); * Yes ! i already call lt_ic_isr_register() without errors. below is the code i am using for understanding enhance vector interrupt# include <stdio.h># include "sys/alt_irq.h"# include "system.h"# include "altera_avalon_pio_regs.h" volatile int edge_capture; void handle_load_data_interrupts(void* context, alt_u32 id) { volatile int* edge_capture_ptr = (volatile int*) context; IOWR_ALTERA_AVALON_PIO_IRQ_MASK(LOAD_DATA_BASE, 0x1 ); *edge_capture_ptr = IORD_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_DATA_BASE); IOWR_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_DATA_BASE, 0x1); IORD_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_DATA_BASE); } void init_load_pio() { void* edge_capture_ptr = (void*) &edge_capture; IOWR_ALTERA_AVALON_PIO_IRQ_MASK(LOAD_DATA_BASE, 0x1); IOWR_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_DATA_BASE, 0x1); alt_ic_isr_register(LOAD_DATA_IRQ_INTERRUPT_CONTROLLER_ID, LOAD_DATA_IRQ, handle_load_data_interrupts, edge_capture_ptr, 0x0); } int main() { int rc; rc = alt_ic_irq_enable(VIC_INTERRUPT_CONTROLLER_ID,VIC_IRQ); if(rc<0) printf("\n\tEnhance Interrupt not enabled, Return value = %d",rc); else printf("\n\tEnhnace interrupt enabled, Return value = %d",rc); printf("\n\tInitillize the Enhanced Interrupt.."); init_load_pio(); return 0; } - Altera_Forum
Honored Contributor
Hello Cris, i think you are indicating the Hardware Interrupt, i mean my LOAD_DATA pulse which is coming form outside having priority no. 3.
i write the LOAD_DATA in place of VIC_IRQ and it return 0, mean interrupt is enabled. Thanking you. Kaushal - Altera_Forum
Honored Contributor
Exactly. That's what I meant.
Regards - Altera_Forum
Honored Contributor
Thanking you Cris
Will This Code work in OS environment (uc/OS-II) also, currently i am using HAL based platform only for understanding VIC....? In OS environment lot's of interrupt driven module working simultaneously....like networking , RS-232,...etc i mean will this same code work over OS-environment without affecting other functionality... i wanted to use this VIC on my project where networking based application (Client) running. Regards kaushal - Altera_Forum
Honored Contributor
Using interrupts in OS environment is usually not recommended because it's easy to mess up everything.
Anyway I myself have used VIC with uC-OS and I confirm it works, provided you know EXACTLY what you are doing and you are very careful. - Altera_Forum
Honored Contributor
Hello There,
External Interrupt controller VIC have better speed performance then internal interrupt controller but in my sample code (below) for understanding VIC, won't reflect edge_capture status on pin TEMP_OUT_BASE like if edge_capture get high it will put 1 on TEMP_OUT_BASE otherwise put 0 on TEMP_OUT_BASE. my aim is to reading 2D-array whenever edge_capture get interrupt. "IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE,0x1)" *i have attached my sopcinfo for refrence.
Regards kaushalint main() { int rc; unsigned long int count =0; printf("\n\tInitillize the Enhanced Interrupt.."); # ifdef LOAD_DATA_BASE init_load_data(); # endif rc = alt_ic_irq_enable(VIC_INTERRUPT_CONTROLLER_ID,LOAD_DATA_IRQ); if(rc<0) printf("\n\tEnhance Interrupt NOT enabled, Return value = %d\n",rc); else printf("\n\tEnhnace interrupt ENABLED, Return value = %d\n",rc); /* //---Should i add these alt_ic_irq_enable for other peripheral also...........?? rc = alt_ic_irq_enable(VIC_INTERRUPT_CONTROLLER_ID,JTAG_UART_IRQ); rc = alt_ic_irq_enable(VIC_INTERRUPT_CONTROLLER_ID,SYS_CLK_TIMER_IRQ); */ IOWR_ALTERA_AVALON_PIO_DATA(STRT_OUT_BASE,HIGH); //Generate Start Signal do { if(edge_capture) { IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE,0x1); //TEMP_OUT not Visible on Oscilloscope edge_capture = 0; //Clear Interrupt //printf("\nHIGH"); //Visible on Console } IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE,0x0); //printf("\t\tLOW\n"); //Visible on Console }while(1); return 0; } - Altera_Forum
Honored Contributor
You set TEMP_OUT to 1 then you immediately deassert it to 0. If you are sure your isr is being serviced, then you simply can't see the pulse on oscilloscope because the signal doesn't have enough time to switch high.
Add some delay before IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE,0x0) You could also toggle TEMP_OUT upon receipt of edge_capture and then connect the pio to some logic which generates a fixed length pulse on each transition.