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Altera_Forum
Honored Contributor
13 years agoWhy Vectored Interrupt Controller IRQ -1 ?
Hello Friends i have added Vectored Interrupt Controller and generate the BSP but system.h reflect that VIC IRQ is -1 /* VIC configuration */ #define ALT_MODULE_CLASS_VIC altera_vic #def...
Altera_Forum
Honored Contributor
13 years agoHello Cris, i think you are indicating the Hardware Interrupt, i mean my LOAD_DATA pulse which is coming form outside having priority no. 3.
i write the LOAD_DATA in place of VIC_IRQ and it return 0, mean interrupt is enabled. Thanking you. Kaushal