VGA Component für NEEK

You can modify the one from DE2VGA example.

- Hippo

Hello,

after some issues with the touch screen driver I would like to refer back on this topic.

As I assumed you refered to the de2vga components also used in frame buffer example on http://www.nioswiki.com/operatingsystems/uclinux/framebuffer (de2_vga.zip)

Could you provide me the source of the de2vga example if I'm wrong, please.

Further more could you please list the modifications/modified component settings I have to perform?

I would appreciate your help.

Regards,

D

Yes, I mean the de2_vga.zip. The vga controller was posted on old niosforum.

On the other hand, there are video input/output core in sopc builder of quartus v9.1. I would suggest them for new design. Though I don't have time to try out myself.

- Hippo

Thank you for your fast reply!

I'm working with Quartus 9.0sp2. Target Board is NEEK.

Actually "Clocked Video Output/Input" (SOPCBuilder: Video and Image Processing -> IO -> Clocked Video Output) are included in Quartus 9.0sp2.

Did you mean this cores?

I wanted to extend the cIII standard system files (you posted under:

http://www.nioswiki.com/@api/deki/files/115/=neek_ocm_spi.zip)

with a vga component and use it on NEEK.

1) Is it possible with 'modified' de2vga files and/or video output cores of quartus 9.1?

The controller you mentioned is that one http://forum.niosforum.com/forum/index.php?showtopic=3165

if I'm right.

2) Could you roughly point out the changes I have to consider if the extension with de2vga is possible on the mentioned system files?

Regards,

D

Yes, it is in the 3165 post. You can copy the VGA_controller_component dir to your neek project's ip directory.

neek_ocm_spi/ip/VGA...

Then you can add it within sopc builder. Be sure to name it as "vga_controller_0". Connect master port to ddr sdram, and slave port to peripheral bus. You will need to modify the top level design to connect the video outputs.

- Hippo

Thanks.

Sorry for my bad knowledge, but I have two more questions:

1) Placed and connected the vga_controller into the sopc system.

What clock does the slave/master port of the vga_controller need? (Configured the controller: 1024x768 65 MHz)

2) Do I need further components like parts of the modified de2vga example?

I would like to keep you informed for potential questions.

D.

I need some help with error issues after trying to generate the system (SOPC Builder).

As stated above I integrated the vga controller into the standard cIII system and hit 'Generate' but an error states the following report:

error: one or more components could not be located (ddr_high_perf). check ip search path under tools->options... in sopc builder.

error: system generation failed.

I set the search path for the ddr_high_perf component to the proper IP folder where the component is located but the error will still appear.

Have you some advice on this problem?

Appreciate,

D