Nios 2 Boot Issue

Hi, Johnson

Can you check if the reset vector offset is larger than the FPGA image size ?

For instance, if the size of the FPGA image is estimated to be less than 0x01E00000, you can set the Nios II Reset Vector offset to 0x01E00000 in Qsys, which is also the start of the boot copier.

Also make sure that All settings in Settings.Advanced.hal.linker in BSP editor are left unchecked.

Thanks.

Eric

Hi Eric,

Thank you for getting back,

From my post above at the last image, FPGA will use flash up to 0x00AEFFFF.

And Nios starts from 0x010000 to 0x0107DFFFF.

And Link setting in BSP editor are left unchecked as above..

Would it be possible caused by the elf to hex conversion?

As in Q19.2, the tool has problem that I have to do it manually.

And I am not sure this tool will cover Micro Flash or not..

BRs,

Johnson

Hi, Johnson

Do you mean you could program MT25QU256 flash according to the address range above using JTAG and Nios is booting ?

Thanks.

Eric

Hi Eric,

I can program the flash using JTAG + SFL or AS mode.

FPGA and Nios CPU is up but not the application.

I have to download the elf again through JTAG..

FYI!

BRs,

Johnson

Hi Eric,

I

followed your instructions to generate the jic and pof by assign the start ti

0x00 instead of "auto".

Then

the converting can not execute because of errors.

I attach the images for your reference.

jic_gen

pof_gen

BRs,

Johnson

Hi, Johnson

Then you may use auto or 0x00000020 as start address.

For the .hex generation, may I know what problem you face when you generate .hex from .elf in Quartus 19.2 ?

At the meantime, I will look at the manual method you use to convert .elf to .hex and will get back to you.

Thanks.

Eric

Hi Eric,

Thanks!

Use the 0x0000_0020 offset value worked and jic file generated without problem.

But the program was not running after programming.

The error message while executing mem_init_gen, please see below.

By the way, I am study AN458 about boot copier.

It mentioned boot copier executes from the on-chip memory block in EPCQ controller..

How do I know it is working?

BRs,

Johnson

Hi Eric,

One quick question,

May I use Generic Serial Flash to replace EPCQ for Nios 2 ?

I instantiate it in platform designer and assign reset vector to it.

But BSP editor does not show it in Linker Section.

BRs,

Johnson

Hi, Johnson

Please also remember to compress your .sof under Properties when Convert Programming File, to .jic.

If still failed, can you send to me your design files ?

Thanks.

Eric

Eric,

I don't think the compression will work as it only worked for sof file.

And my FPGA image is always fine..

I will test it and reply you later.

What design file do you need, sof + elf ?

BRs,

Johnson