HPS GPIO's ouputs stuck in high impedence?

Hi kyle,

As you suggested the assignment editor is showing GPIO_1[29] to GPIO_1[34] with I/O standard and 3.3 V LVTTL.

Still when I access from linux space the GPIO_1[29] corressponds to GPIO198 does not glow.

I have chosen Unused pins as Input trigerred...the question is if there is wrong in .SOF how HPS_LED(GPIO_1[53]) is glowing from the linux space...

If I give this command

echo "leds-gpio" > /sys/bus/platform/drivers/leds-gpio/unbind

-sh: echo: write error: No such device

why is this error shown...should I map my pin as HPS_GPIO or GPIO_1[29] is more than enough..any specific reason to add HPS_GPIO??

thanks

Ravi

also my address to GPIO_1 is 0xff09000 which is GPIO 198-226

my address to GPIO_0 is 0xff080000 which is GPIO 227-255..is this correct value and address??thats what I have assumed

Hi kyle,

GPIO_1_DN all are in Bank 4 which is where all the pins for GPIO_1 expansion headers are there.Now HPS_GPIOXX is in Bank 7 .How are these 2 linked??..If not how do we link??also let me know if we need to link in Qsys or in Assignment editor..can we access GPIO_1_D1 directly from the top file...some linking is required I feel.

Thanks in advance

Ravi

Hi kyle,

If you look at the Pin planner GPIO_1[29] is connected to A8 whereas actually according to expansion headers GPIO_1 [1] AG_28 and user manual PDF.

Bank 4 corresponds to GPIO_1[1] expansion headers which is interpreted in gpio as GPIO_1_D1 .

whereas HPS_GPIO59 is GPIO_1[29] in my pin planner..so how do we ensure both the pins are same..is there any link between bank 4 and bank 7 ??

Kindly help the last mile.

regards

Ravi

My requirement is I need to access both the expansion headers pin GPIO_1 and GPIO_0.Kindly let me know what changes needed to be done at the top .V file or in qsys to get the accessibility of the GPIO and setting and clearing the pins.there is some catch in accessing the bank 4 pins from bank 7 ...do we need any hardware changes???

--Ravi

Hi kyle,

what is the command to execute device tree ...I did some find /proc/device-tree but did not give the result.

Kindly let us know

thanks

Ravi

--- Quote Start ---

Hi ravi,

They are not bound in your case.. there is nothing obvious on your debug list... except the controllers and this is normal.

As your device tree would have something like this included to attach the GPIOs to the memory locations:

hps_0_gpio0: gpio@0xff708000 {

compatible = "snps,dw-gpio-14.0", "snps,dw-gpio";

reg = < 0xFF708000 0x00001000 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 164 4 >;

clocks = < &l4_mp_clk >;

# gpio-cells = < 2 >;

gpio-controller;

}; //end gpio@0xff708000 (hps_0_gpio0)

hps_0_gpio1: gpio@0xff709000 {

compatible = "snps,dw-gpio-14.0", "snps,dw-gpio";

reg = < 0xFF709000 0x00001000 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 165 4 >;

clocks = < &l4_mp_clk >;

# gpio-cells = < 2 >;

gpio-controller;

}; //end gpio@0xff709000 (hps_0_gpio1)

hps_0_gpio2: gpio@0xff70a000 {

compatible = "snps,dw-gpio-14.0", "snps,dw-gpio";

reg = < 0xFF70A000 0x00001000 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 166 4 >;

clocks = < &l4_mp_clk >;

# gpio-cells = < 2 >;

gpio-controller;

}; //end gpio@0xff70a000 (hps_0_gpio2)

Have you tried other GPIO's? Perhaps its your circuit or you have included a device on your GPIO's such as a peripheral (UART, SPI or CAN controller) to these pins in Quartus Qys design and is not configurable.

Or you have forgotten to add it again in the pin assignments like you did originally with the first GPIO's this could be your issue.

regards

Kyle

--- Quote End ---

Hi kyle,

once I complete the preloader using bsp-editor and execute make and make Uboot...the same image I copied onto the card.but Initially I was using a default deo nano image with deo nano .rbf...should I replace the .rbf???....then I wil flash the .SOF and then if I try this image then still my GPIO is in high condition only same as what you have faced.Kindly Let me know how to get over this ...do we need to compile with weak pull up ???

Pl help us kyle.

regards

Ravi

--- Quote Start ---

I have an issue regarding a custom board the GPIOs where all the HPS IO’s are set to high impedance no matter to how they are set.

I have tested the following:

• GPIO system on linux enabling each of the GPIOs as an output through the controller... and writing values to them... (findings it changes to output state but the value doesn’t alter and reads back high - unchanged)

• GPIO controller address read/write (findings values don’t change)

• Pre-Linux Hardware GPIO Loaning Pins driving a value change on preloader startup to enable a LED (findings no value on GPIO changes value)

So overall the pin mux is there just the GPIO is always set to high... no matter if the gpio output is enabled and values are written to it. All three methods work on our development board with or without Linux drivers included for the LEDs “gpio-leds” simple driver, but not on the custom board. Our PCB has the HPS GPIO LEDs that do not light or even the unconnected header pin doesn’t change value (in your experience does a open gpio pin change value (we think it should still be driven) – this would mean that it is not a driver issue)

The LED output schematic and just applying a 1 or 0 would change this state no problem. It is a different type of Led than the one used on the development board. It uses a power driven led that has a dual red and green operation so should work.

With the open gpio pins not changing state this points to high impedance for all gpio’s, which I am trying to see the differences.

1) Our GPIO Controller has 67 I/O pins connected but none of the 14 input ony pins. (I will try searching for this configurable through u-boot?) – states if not connected need to be weak pull-up.

2) Device Tree can be set without LED driver on the sockit to drive the simple LED’s or can be set accordingly without setting the GPIO through the altera software.

With our leds requiring a power-supply are there special flags to use in the driver but the power is already been supplied, but even the open pin doesn’t drive a signal so I doubt this is the issue.

3) Current Drive or signal circuitry?

Please Advise on what could make the GPIO's not change state and become driven always at the 3.3V outputted voltage?

Thanks

Kyle

--- Quote End ---

Hi kyle ,

How do I use the Device generator to create the .dtb file??...since all the device tree is in here I need this...I do not how to create this...I have the .rbf and uboot.img with me ..kindly let us know.

regards

Ravi

Hi kyle ,

How do I use the Device generator to create the .dtb file??...since all the device tree is in here I need this...

steps to create the .img ,dtb and .rbf

1. while I created the .SOF we got the .rbf

2. .img I ran the make and make uboot ,along with bsp editor and got the img

3. .DTB one can use SOPC2DTS command from the embedded shell..but there are 2 .xml required to run clock tree and board xml...I am confused by the names..is it underhps_isw_handoff or the SOC_system folder when we create the .Qsys...

4. If I get all three and do a cat all get the final image and flash onto SD card we should see the GPIO pins glowing..

reached the final step..kindly help.

regards

Ravi

..kindly let us know.

regards

Ravi

Hi kyle,

This is the device tree I got socfpga.dts after creating using dtc

hps_0_gpio0: gpio@0xff708000 {

compatible = "snps,dw-apb-gpio", "snps,dw-gpio-16.1", "snps,dw-gpio";

reg = <0xff708000 0x00000100>;

interrupt-parent = <&hps_0_arm_gic_0>;

interrupts = <0 164 4>;

# gpio-cells = <2>;

gpio-controller;

# address-cells = <1>;

# size-cells = <0>;

hps_0_gpio0_porta: gpio-controller@0 {

compatible = "snps,dw-apb-gpio-port";

gpio-controller;

# gpio-cells = <2>;

snps,nr-gpios = <29>;

reg = <0>;

interrupt-controller;

# interrupt-cells = <2>;

interrupts = <0 164 4>;

interrupt-parent = <&hps_0_arm_gic_0>;

}; //end gpio-controller@0 (hps_0_gpio0_porta)

}; //end gpio@0xff708000 (hps_0_gpio0)

hps_0_gpio1: gpio@0xff709000 {

compatible = "snps,dw-apb-gpio", "snps,dw-gpio-16.1", "snps,dw-gpio";

reg = <0xff709000 0x00000100>;

interrupt-parent = <&hps_0_arm_gic_0>;

interrupts = <0 165 4>;

# gpio-cells = <2>;

gpio-controller;

# address-cells = <1>;

# size-cells = <0>;

hps_0_gpio1_porta: gpio-controller@0 {

compatible = "snps,dw-apb-gpio-port";

gpio-controller;

# gpio-cells = <2>;

snps,nr-gpios = <29>;

reg = <0>;

interrupt-controller;

# interrupt-cells = <2>;

interrupts = <0 165 4>;

interrupt-parent = <&hps_0_arm_gic_0>;

}; //end gpio-controller@0 (hps_0_gpio1_porta)

}; //end gpio@0xff709000 (hps_0_gpio1)

hps_0_gpio2: gpio@0xff70a000 {

compatible = "snps,dw-apb-gpio", "snps,dw-gpio-16.1", "snps,dw-gpio";

reg = <0xff70a000 0x00000100>;

interrupt-parent = <&hps_0_arm_gic_0>;

interrupts = <0 166 4>;

# gpio-cells = <2>;

gpio-controller;

# address-cells = <1>;

# size-cells = <0>;

hps_0_gpio2_porta: gpio-controller@0 {

compatible = "snps,dw-apb-gpio-port";

gpio-controller;

# gpio-cells = <2>;

snps,nr-gpios = <27>;

reg = <0>;

interrupt-controller;

# interrupt-cells = <2>;

interrupts = <0 166 4>;

interrupt-parent = <&hps_0_arm_gic_0>;

}; //end gpio-controller@0 (hps_0_gpio2_porta)

}; //end gpio@0xff70a000 (hps_0_gpio2)

sopc2dts --input soc_system.sopcinfo --output socfpga.dts

dtc -I dts -O dtb -o socfpga.dtb socfpga.dts

I used these 2 commands to create the .dtb and the .rbf from the qsysy what I have. then I copied the uImage .img and then the .rbf and dtb.

still my gpios are not set...any missing link...

Thanks in advance

Ravi

--- Quote Start ---

Hi ravi,

They are not bound in your case.. there is nothing obvious on your debug list... except the controllers and this is normal.

As your device tree would have something like this included to attach the GPIOs to the memory locations:

hps_0_gpio0: gpio@0xff708000 {

compatible = "snps,dw-gpio-14.0", "snps,dw-gpio";

reg = < 0xFF708000 0x00001000 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 164 4 >;

clocks = < &l4_mp_clk >;

# gpio-cells = < 2 >;

gpio-controller;

}; //end gpio@0xff708000 (hps_0_gpio0)

hps_0_gpio1: gpio@0xff709000 {

compatible = "snps,dw-gpio-14.0", "snps,dw-gpio";

reg = < 0xFF709000 0x00001000 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 165 4 >;

clocks = < &l4_mp_clk >;

# gpio-cells = < 2 >;

gpio-controller;

}; //end gpio@0xff709000 (hps_0_gpio1)

hps_0_gpio2: gpio@0xff70a000 {

compatible = "snps,dw-gpio-14.0", "snps,dw-gpio";

reg = < 0xFF70A000 0x00001000 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 166 4 >;

clocks = < &l4_mp_clk >;

# gpio-cells = < 2 >;

gpio-controller;

}; //end gpio@0xff70a000 (hps_0_gpio2)

Have you tried other GPIO's? Perhaps its your circuit or you have included a device on your GPIO's such as a peripheral (UART, SPI or CAN controller) to these pins in Quartus Qys design and is not configurable.

Or you have forgotten to add it again in the pin assignments like you did originally with the first GPIO's this could be your issue.

regards

Kyle

--- Quote End ---