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drbarryh's avatar
drbarryh
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2 months ago

How to reduce ROM/RAM requirements for a NIOSV Compact CPU Platform?

Hello ALTERA NIOSV Experts, I am trying to create a system in Quartus Platform Designer which has the following components: A 1G Tri mode ethernet IP (with 32 bit AVALON-ST TX/RX interfaces using ...
Embedded Applications Layer
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Nios Architecture
Nios Cpu
LiangYuG_Altera's avatar
LiangYuG_Altera
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2 months ago

Hi drbarryh​ ,

You might be interested in this chapter : Nios V Processor Software Developer Handbook - Reducing Code Footprint in Embedded Systems. 

My first recommendation is Apply Compiler Flags in the BSP.

Remember to run the cmake with "CMAKE_BUILD_TYPE=Release" to enforce the optimization flag.
Without it, the ELF will be unoptimized for debug purpose.

cmake -S sw/app -B sw/app/build -G 'Unix Makefiles' -DCMAKE_BUILD_TYPE=Release

Regards,
Liang Yu

  • drbarryh's avatar
    drbarryh
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    2 months ago

    Thanks for your help Liang,  And the compiler flag suggestions i will try out. Yes your right i do need to use the Release version during my compiles !!

    Cheers, Dr Barry H

    • BoonBengT_Altera's avatar
      BoonBengT_Altera
      Icon for Moderator rankModerator
      1 month ago

      Dear drbarryh ,

      Since clarification has been provided and no further follow‑up questions have been raised, we will assume the issue has been resolved. 
      This thread will now be transitioned to community support, where other users can continue to assist with any additional inquiries.
      For new questions, please feel free to open a fresh thread — we’ll be happy to support you there.

       

      Thank you for being part of the community!

      Best regards,
      Altera Technical Support