How to reduce ROM/RAM requirements for a NIOSV Compact CPU Platform?

Hi Dr Barry,

You can reduce the Nios V software size through BSP setting. 3.2.1. Nios® V Processor Board Support Package Editor

Here is comparison on the BSP setting on a Hello world program. 2.3. Software Optimization

If this still not able to fit in your FPGA, you might want to look to a larger FPGA.