FlashProgrammer has some problem!

It is hardware wired on DE2 board.

The sof for fpga must go EPCS.

The zImge can go eithter EPCS or CFI flash.

But the zImage might be too large for EPCS.

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originally posted by hippo@Feb 12 2007, 11:17 PM

it is hardware wired on de2 board.

the sof for fpga must go epcs.

the zimge can go eithter epcs or cfi flash.

but the zimage might be too large for epcs.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=21490)

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Hi,hippo

thx again for your reply.

I will program sof on EPCS and zImage on CFI Flash.

But I fund one Question. How does select in kernel menuconfig?

NiosQ

The zImage is loaded to sdram by a altera supplied boot loader. So there is nothing to do with kernel config.

Since you want to boot from cfi flash, you must make sure the Nios2 reset vector in SOPC builder pointed to cfi flash. Though it should be the default.

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originally posted by hippo@Feb 13 2007, 09:45 AM

the zimage is loaded to sdram by a altera supplied boot loader. so there is nothing to do with kernel config.

since you want to boot from cfi flash, you must make sure the nios2 reset vector in sopc builder pointed to cfi flash. though it should be the default.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=21517)

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Hi,hippo

Sorry for my question.

If i program zImage on CFI Flash then how to display boot message on PC?

Is use NiosII IDE or need other terminal?

NiosQ

If you jtag uart, then you must have nios2 terminal connected.

NOTE, you can use JTAG UART console during development. But if you don&#39;t connect a nios2-terminal, the program will hang. So you shouldn&#39;t use JTAG UART console for standalone or production. You must disable JTAG UARTconsole then. You still need a console device after disabling JTAG UART console, otherwise the init task will exit and panic. You may use Nios serial uart as console, or use Virtual Terminal (actually it can be dummy) as console.

If you use serial uart, you use RS232 cable with hyper-terminal on Window, or minicom and kermit on Linux.

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originally posted by hippo@Mar 19 2007, 08:45 PM

if you jtag uart, then you must have nios2 terminal connected.

note, you can use jtag uart console during development. but if you don&#39;t connect a nios2-terminal, the program will hang. so you shouldn&#39;t use jtag uart console for standalone or production. you must disable jtag uartconsole then. you still need a console device after disabling jtag uart console, otherwise the init task will exit and panic. you may use nios serial uart as console, or use virtual terminal (actually it can be dummy) as console.

if you use serial uart, you use rs232 cable with hyper-terminal on window, or minicom and kermit on linux.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=22351)

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thank you for your give me some suggest!^^

I will trying out it.

NiosQ

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originally posted by hippo@Mar 19 2007, 08:45 PM

if you jtag uart, then you must have nios2 terminal connected.

note, you can use jtag uart console during development. but if you don&#39;t connect a nios2-terminal, the program will hang. so you shouldn&#39;t use jtag uart console for standalone or production. you must disable jtag uartconsole then. you still need a console device after disabling jtag uart console, otherwise the init task will exit and panic. you may use nios serial uart as console, or use virtual terminal (actually it can be dummy) as console.

if you use serial uart, you use rs232 cable with hyper-terminal on window, or minicom and kermit on linux.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=22351)

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Hi,hippo

I following "FlashProgrammer" doc program flash.

If you use EPCS flash, find out and change the sof path and epcs base below.

Open a Linux shell terminal, (or a Nios2 command shell on Windows)

# config the fpga

nios2-configure-sof your_system.sof# change to your uClinux image dir

cd ~/uClinux-dist/images# Creating .flash file for the FPGA configuration

sof2flash --epcs --input=$SOPC_KIT_NIOS2/examples/verilog/niosII_cycloneII_2c35/standard/standard.sof --output=standard.flash# Programming flash with the FPGA configuration

nios2-flash-programmer --epcs --base=0x00900800 standard.flash# Creating .flash file for the project

elf2flash --epcs --after=standard.flash --input=zImage --output=epcs_controller.flash --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_epcs.srec# Programming flash with the project

nios2-flash-programmer --epcs --base=0x00900800 epcs_controller.flash

I&#39;m disable Jtag uart and enable serial uart, I use RS232 cable with hyper-terminal on Window.

Powerup DE2 board but it has on response.

What&#39;s problem?

NiosQ

Did you test the new sof with serial uart and uClinux image using jtag download?

You should make them work before flash programming.

You sould not use nios2-terminal in this case,

use RS232 cable and a terminal emulater, such as Hyper-terminal on Windows, or minicom on Linux.

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originally posted by hippo@Mar 22 2007, 09:39 PM

did you test the new sof with serial uart and uclinux image using jtag download?

you should make them work before flash programming.

you sould not use nios2-terminal in this case,

use rs232 cable and a terminal emulater, such as hyper-terminal on windows, or minicom on linux.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=22447)

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Hi ,hippo

I tested the new sof with serial uart and uClinux image using jtag download.

I will use RS232 cable and Hyper-terminal run it,but it has not response.

I will try out again.

I have one question the "reset address" is "offset + address" in SOPC Builder?

NiosQ

The reset address in SOPC builder has nothing to do with uclinux.

If you want to boot uclinux from epcs, select epcs as reset address.

If you want to boot from cfi flash, select cfi flash as reset address.

First, you should make RS232 work using jtag download.