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Altera_Forum
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16 years ago

EPCS flash access on BeMicro

Hi,

I am doing some debugging using the BeMicro Cyclone III dev board. I have installed a serial configuration device on the board and I want to test the SOPC EPCS Flash controller. I am not using the flash to configure the FPGA but just want to test storing data to the configuration flash. In Quartus under the Device and Pin Options, I have set the serial configuration pins to "Use as regular I/O", and I put a define for ALT_USE_EPCS_FLASH in the Nios BSP project. The HAL does not detect the epcs flash.

I have probed the pins on the flash device and I see chip select go low twice during initialization, but there is no activity on the clock or data pins. The clock pin is actually sitting at a DC level of about 1V. Do I need to set the boot mode to AS to be able to use the EPCS Flash Controller? Is there anything else I should be doing?

Thanks.

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Have you added an epcs_controller and connected the EPCS pins at the top level? I don't think that's done automagically for you in a Cyclone III device.

    -slacker
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    I have the EPCS controller included in my SOPC design. The attached image shows the connection to the top level pins. The write protect pin is not used - this is a place holder for the final board design.

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    When you state that the HAL does not detect the EPCS device what do you mean? Where does the HAL initialization routine fail? Is the EPCS's device/silicon ID successfully read? You can step through this code by setting a break point before the epcs_controller's initialization call and step through it to see what's happening.

    Also, have you tried the "Memory Test" example design? It has some routines that test EPCS devices as well as CFI flash devices.

    Cheers,

    -slacker
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi,

    I have not tried the memory test example yet, but it looks to be a hardware (hdl) issue rather than firmware issue. I have stepped through the code and from the alt_epcs_flash_query function (originating from the alt_sys_init function) there are two calls to attemp to read the silicon ID (epcs_read_electronic_signature and epcs_read_device_id). For both of these functions, the chip select to the epcs flash is driven low, but as I stated previously there is no activity on either the data or clock pins (the clock signal is actually sitting at an intermediate voltage of about 1V).

    Any suggestions on what to check or try would be appreciated.

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Another update:

    I added a signaltap module to monitor the EPCS signals as they are exported from the SOPC module. I see dclk and sdo waveforms being generated correctly internal to the FPGA. So there must be something wrong at the pin buffer interface level.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    The jumper (B400) on the Bemicro must be changed or the EPCS cannot work. An unchanged B400 places the FPGA in Passive Serial Mode. After configuration the DCLK pin (H1) will always be an input. It needs to be an output for EPCS usage. Other pins may also be a problem, but this one is definitely a problem.