Forum Discussion
Downloading ELF Process Fail
I cannot connect with Eclipse, while I can connect with Altera Quartus Programmer, which probably means this is not a problem with signal integrity or in FPGA, but something with Intel SBT. In order to resolve the problem, I switch power off/on, play with USB, delete and define debugging setting in Eclipse and some other similar things, until Eclipse recovers. Sometimes it takes 1-2 hours until the problem recovers and then sometimes 15 min after I encounter the problem again. We are starting a new project and debugging capabilities are very important to me and I want to resolve the problem.
I see there is a much newer Quartus SW SBT version (20+), but I don't know if it resolves my issue and whether it is the problem at all.
When I use Eclipse to debug and Quartus Programmer to load sof file, is it the same path for my FPGA?
My FPGA is Arria-ii.
I am trying to debug NIOS-II.
Will be glad to hear any idea one can suggest me to try.
9 Replies
- Yevpator
New Contributor
Interesting that several times when I had the problem with Eclipse to load elf, i opened command shell and was able to load elf into my fpga. That is to say the problem related with the IDE (Altera SW SBT). I recall that in the past i experimented with opening another project when i had problems to load elf with a current one and it also worked for me. I use version 18.1, i would consider upgrading the Altera SW SBT if i knew the issue was addressed and resolved , but i failed to find this issue in the release notes , therefore i don't want to waste time on moving to a new version that won't release my problem.
Thanks
- aikeu
Regular Contributor
Hi Yevpator,
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Thanks.
Regards,
Aik Eu
- Yevpator
New Contributor
Actually, I didn't respond because I don't get messages to my email when a new response is posted .
I didn't resolve the issue. It's a nightmare. Thank you
- Yevpator
New Contributor
Dear Aik Eu,
No it is not related with the code size. Sometimes i succeed to enter the debug mode, suddenly the debug session fails or i exit and next time I try to load the same elf file without changing its size it does not work.
- Yevpator
New Contributor
Thank you for your comment.
The clock is ok - as I wrote before I manage to program or load image file with the Programmer or even with NIOS shell (tried that today). If I had issue with the clock, I wouldn't be able to load sof file with the Altera programmer, but it works good, the problem happens only while I am debugging with Eclipse.
- aikeu
Regular Contributor
Hi Yevpator,
Glad that you have resolve the issue on your side.
Anyway after checking with the team, there is no much intermittent failure in the downloading elf process.
Mostly is failure due to hardware IP/BSP setting as below:
- JTAG Timing Constraint (https://www.intel.com/content/www/us/en/docs/programmable/683081/22-2/jtag-signals.html)
- System clock frequency = 4x JTAG frequency (https://www.intel.com/content/www/us/en/docs/programmable/683836/current/jtag-target-connection.html)
Thanks.
Regards,
Aik Eu