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Altera_Forum
Honored Contributor
20 years agoDMA and Uart
hi !
i would like to start implement DMA controller with uart I already generate and download my system into fpga startix II dev board succefully . I saw also documents about DMA , bit into status and control register . To increase performances in my application i would like to use DMA with uart . In this case i need transaction between Ram to uart and vicerversa, try to image a communication RS485 . My fpga will be a master of RS485 com. and then send data from ram to uart , and receive data from uart to ram . When interrupt end transaction occur i process buffer in I would like to know wich important steps i have to follow thanks walter13 Replies
- Altera_Forum
Honored Contributor
for example i have to send this structure data do uart
typedef struct RS485{ float data1; float data2; int data3[10]; long data4; }mydata; with sizeof(mydata) i can know the lenght of datas to send but there is not addressof(...) function to know the address in memory of my data structure ; The function alt_dma_txchan receive differents arguments , i can put &mydata instead the address in memory , i will try but where i specifie the uart ? thanks walter ciao - Altera_Forum
Honored Contributor
i tryed different way .
In sopc builder connecting write port dma to ext bus ram and read port dma to uart. After setting flag end of packet for the uart After without setting end of packet i wrote following code : # include "dma_test.h" typedef struct COMM { float data1; float data2; float data3; int data4; int data5; int data6; int data7; }Master; Master data_send; # define DMA_0_STATUS_REG 0# define DMA_0_READ_ADDR_REG 1# define DMA_0_WRITE_ADDR_REG 2# define DMA_0_LENGHT_REG 3 # define DMA_0_CONTROL_REG 6 int main(void) { data_send.data4=10; data_send.data5=100; data_send.data6=33; data_send.data7=44; IOWR(DMA_0_BASE,DMA_0_READ_ADDR_REG,&data_send); IOWR(DMA_0_BASE,DMA_0_WRITE_ADDR_REG,UART_0_BASE); IOWR(DMA_0_BASE,DMA_0_LENGHT_REG ,28); IOWR(DMA_0_BASE,DMA_0_CONTROL_REG ,ALTERA_AVALON_DMA_CONTROL_BYTE_MSK | ALTERA_AVALON_DMA_CONTROL_GO_MSK | ALTERA_AVALON_DMA_CONTROL_WCON_MSK ); printf("data_send:%u\r ",sizeof(data_send)); while(true) { } return(0); } i set fixed address for write port dma (uart) and else but nothing was sent . i can't understand what i need and what i have to do Impossible to find good documentation for dma-uart , what to do in sopc builder and what to do in sw. Maybe need to set something for the uart ,but how I need this to communicate different devices fpga in a new project but if i don't know dma-uart i will make sending one byte at time , and load cpu for increasing buffer receive and transmiter . Uncredible ..... not possible to find more informations about this ciao walter - Altera_Forum
Honored Contributor
better forget dma and nios II also
http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif - Altera_Forum
Honored Contributor
pmicro,
It should be possible to use a DMA to setup a streaming transfer from/to a block of memory... From what you've mentioned, I believe you have a custom UART, so you should be aware that you do have to make sure that your UART supports streaming transactions. BadOmen already pointed you to the resource on the DMA and there is a similar resource for the Avalon UART. Please explain both your hardware and your software a bit better...and try to get simple memory-to-memory transfers working...first, with the DMA. ...and get an attitude improvement injection :-) This is, after all, a free forum! Cheers, - slacker - Altera_Forum
Honored Contributor
i'm using stratix II development board .
I already complete my system with anything such as controller for ram , flash , ext flash , uart , niosII processor , my_timer ton , my_timer tof ,my_clocks , and dma I saw a lot of documents , relative to avalon switch fabric , avalon bus , peripheral slave , dma with hal , dma in reference handbook and for the uart too . These documets only talk about streaming data beetwen memory to memoryThere are some code examples but relative to memory to memory not uart and dma .I try different ways but nothing . I try to use uart but indipendent, registering interrupt for empty register to send and interrupt when receive a caracter . But i don't want to use cpu and interrupt for communication , instead using dma ->uart and viceversa . In sopc builder i connect master read port of dma to ram brodge slave port and master write port of dma to uart fixed register . I also set the flags in control register to heve this, you can see above but nothing . I have , for example a structure data composed by different kind if data ,and i get size of it using "sizeof(mydata_struct)" and then i pass &mydata_struct like as address start for dma read source . after that i pass uart0_base_address parameter for fixed address write source. Of course setting relative bit in the control status dma_0. Above you can see what i made in the sw , but i don't know if i have to set something else . Pratically i made nothing about the uart in the software , just set the flag EOP end of packet , but this job is automatically make by avalon bus . The dma controller use the EOP from uart to know when makes a new transaction to the uart .After dma transfer all data from memory , it give me an interrupt and a flag in status register that it finish transaction. With the cpu i have only to set regiaster flag and data for dma o also for the uart , if will be like this, how ? There are not good explain to make this http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif Very strange , i am alone to use this tecnic . thanks and regards walter - Altera_Forum
Honored Contributor
in SOPC builder , for the uart there are only two flag to set
-RTS/DTS pins and control register bits -Include end of packet register (for streaming data DMA control) In my case they are setted both Maybe i have to set only the second flag (steaming ....) Tomorrow i will try , regenerate my system , update and download into fpga good night - Altera_Forum
Honored Contributor
for BadOmen:
i already saw this document that you suggest to me But uart doesn't run with Dma Is one week that i'm looking for documents about dma and uart but nothing I cannot understand if is not possible or if is possible but difficult and need more ingeneer to make this job Very strange ciao walter - Altera_Forum
Honored Contributor
I would use Signal Tap II on the interfaces (or simulate the system) so that you can see what is happening in the hardware. That should be a lot quicker than trying to guess your way through it.
- Altera_Forum
Honored Contributor
in sopc builder , dma and uart have some flags , but nothing else .
in IDE NIOS II i set flags to have dma operative , but what i have to do more ? i cannot understand . It's a very hard headache ciao walter