Forum Discussion
Altera_Forum
Honored Contributor
20 years agoDMA and Uart
hi ! i would like to start implement DMA controller with uart I already generate and download my system into fpga startix II dev board succefully . I saw also documents about DMA , bit into...
Altera_Forum
Honored Contributor
20 years agoi'm using stratix II development board .
I already complete my system with anything such as controller for ram , flash , ext flash , uart , niosII processor , my_timer ton , my_timer tof ,my_clocks , and dma I saw a lot of documents , relative to avalon switch fabric , avalon bus , peripheral slave , dma with hal , dma in reference handbook and for the uart too . These documets only talk about streaming data beetwen memory to memoryThere are some code examples but relative to memory to memory not uart and dma .I try different ways but nothing . I try to use uart but indipendent, registering interrupt for empty register to send and interrupt when receive a caracter . But i don't want to use cpu and interrupt for communication , instead using dma ->uart and viceversa . In sopc builder i connect master read port of dma to ram brodge slave port and master write port of dma to uart fixed register . I also set the flags in control register to heve this, you can see above but nothing . I have , for example a structure data composed by different kind if data ,and i get size of it using "sizeof(mydata_struct)" and then i pass &mydata_struct like as address start for dma read source . after that i pass uart0_base_address parameter for fixed address write source. Of course setting relative bit in the control status dma_0. Above you can see what i made in the sw , but i don't know if i have to set something else . Pratically i made nothing about the uart in the software , just set the flag EOP end of packet , but this job is automatically make by avalon bus . The dma controller use the EOP from uart to know when makes a new transaction to the uart .After dma transfer all data from memory , it give me an interrupt and a flag in status register that it finish transaction. With the cpu i have only to set regiaster flag and data for dma o also for the uart , if will be like this, how ? There are not good explain to make this http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif Very strange , i am alone to use this tecnic . thanks and regards walter