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Manprocoder's avatar
Manprocoder
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6 months ago

AXI4 DMA Master Error

Hi expert,

I am building SoC system that includes components as follows:

+ CPU

+ onchip_memory_2_0

+ onchip_memory_2_1 (source address)

+ onchip_memory_2_2 (destination address)

+ IP (Active Ascon) has AXI4 DMAC

As program runs at simulation mode, read burst request runs well, but write burst always encounters problem (awready is always "0" logic level), so DMAC always wait slave, leading

my system to be stuck.

Could you clarify it to me? Thanks you so much.

Attached image

Nios Cpu

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  • BoonBengT_Altera's avatar
    BoonBengT_Altera
    Icon for Moderator rankModerator
    5 months ago

    Hi @Manprocoder,


    This it to let you know that we are still working on your request.

    Will get back to you at earliest.

    Thank you so much for your patients.


    Best Wishes

    BB


    • Manprocoder's avatar
      Manprocoder
      Icon for New Contributor rankNew Contributor
      5 months ago
      Hi @BoonBengT_Altera
      To be completely upfront, I have struggled to find a solution to my issue for 2 weeks before posting it to your forum. But, now, I have no time for it, so, I must turn into Avalon bus.
      Thanks for your energetic support and enthusiasm.
      Best wishes,
      Man
  • SueC_Altera's avatar
    SueC_Altera
    Icon for Contributor rankContributor
    5 months ago

    Hi Manprocoder,

    I've asked our engineering team to look at this issue. We tried running your design in simulation and it got hung with no awvalid or arvalid asserted. They then created a separate design that uses the AXI4 1x1 bridge with Interconnect (Data width: 32b to 64b) and HDL generated in Quartus18.1std. Everything worked fine in this design.

    I'm asking to see if we can share this design with you.

    Sue

  • BoonBengT_Altera's avatar
    BoonBengT_Altera
    Icon for Moderator rankModerator
    5 months ago

    Hi @Manprocoder,


    Good day, just following up on the previous clarification.

    Do let us know if you have further clarification once you managed to look at the design provided.

    Hope to hear from you soon.


    Best Wishes

    BB


  • BoonBengT_Altera's avatar
    BoonBengT_Altera
    Icon for Moderator rankModerator
    5 months ago

    Hi @Manprocoder,


    Greetings, as we do not receive any further clarification/updates on the matter, hence would assume challenge are overcome.


    Please login to ‘ https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions. For new queries, please feel free to open a new thread and we will be right with you. Pleasure having you here.


    Best Wishes

    BB