ContributionsMost RecentMost LikesSolutionsRe: A topic explaining a problem with Cyclone V SoC - u-booting .rbf file failure - got rejected. Wow! I wasn't expecting that resolution! Great job debugging, both of you! Board problems can be so difficult to find! Sue Re: U-Boot "Synchronous Abort" boot failure on Terasic Atum A5 Rev B via Quartus 24.3 .jic generation Hi Motaz_sami, Thanks for posting your solution. That is super helpful to the community. Please review these examples: https://github.com/altera-fpga/agilex5-demo-hps2fpga-interfaces/blob/main/documentation/01_index.md There are a couple in there that enable the bridges. Sue Re: Where is FreeRTOS-Plus-TCP Design Hi JLee25, I'm sorry for the delay. For the C10 GX with SGMII, you can take the A10 μC/OS-II + SGMII design as a reference. The latest released version is 24.2. Here is the link. I hope that helps! Sue Re: Where is FreeRTOS-Plus-TCP Design Hi JLee25, The best starting place would probably be the Arria 10 TSE design. https://docs.altera.com/r/docs/8d454826ee7e62a6a8cdc48813f402492c721691adbd373753ddc9ccedd00290-introduction/arria-10-fpga-triple-speed-ethernet-with-ieee-1588v2-and-native-phy-design-example/introduction Sue Re: Where is FreeRTOS-Plus-TCP Design Hi JLee25, These files are included in your Quartus installation: https://docs.altera.com/r/docs/743810/25.3/nios-v-processor-software-developer-handbook/nios-v-processor-system-requirements?tocId=oLIN3kc3gVXKJvSHSEzbPQ Regards, Sue Re: Agilex 5E ES Memory Performance Issues Hello PHe, You are correct that the performance degradation in the ES devices is due to the errartum you mentioned. This erratum has been addressed in the production devices and the performance is greatly improved. We have included a benchmark example in the 26.1 Golden System Reference Design (HPS Baseline Example Design) that you can use to run standard benchmarks to see the performance. Regards, Sue Re: Nios V license Hi BXia, You have to also register for the Self Service Licensing Center (SSLC) before you can sign in. Please go there and click on the register link. For some reason, I can't put the link in this reply, but if you google Altera SSLC it will take you there. Please let me know if that works. Thanks, Sue Re: Arria 10 SoC – USB devices always enumerating as Full-Speed (Yocto 4.1, dwc2) Hi angelsz15, What remaining questions or concerns do you have? Sue Re: Unable to transmit out of 16550 Compatible UART Thanks for letting us know you solved it! Re: Intermittent DDM Errors Yes this is fixed in Quartus Pro version 26.1.