ContributionsMost RecentMost LikesSolutionsRe: LWH2F Throughput Hi Eric, We are looking into this. We'll get back to you when we have more information. Thanks, Sue Re: gdb server problem when debugging Hi Timo, Nios II has been discontinued. Please use Nios V for a fully updated, supported IP. Thanks, Sue Re: Clarification on Agilex 3 W vs Y Device Variants and Security Feature Mapping Hi JimL, I'm sorry for the delay in responding. We need to update the Device Security Overview to correct the OPN information. The table incorrectly shows that the Y code supports cryptographic services. ONLY the Agilex 3 W and U codes support cryptographic services. Regards, Sue Re: FPGA Community Enqueries Hi bbT, This is a very broad question. For information on getting started with Nios, go to https://www.altera.com/design/guidance/nios-v-developer If you have specific questions after reviewing this information, please post them here. Thanks, Sue Re: Multiple NIOS V Implementation Does this guidance help? not able to use multiple niosV cores at the same time | Altera Community - 354487 Sue Re: GSRD for DE25-Nano Hi Mads_from_Denmark, The example on the Terasic site is a Terasic example. Altera will release the HPS Base Example Design (formerly GSRD) in 26.3. They are two different examples. Sue Re: Implementing many Nios® V cores on Agilex™ 7 I see you posted the same question in a new thread. We will answer there: not able to use multiple niosV cores at the same time | Altera Community - 354487 Thanks, Sue Re: Stratix 10 Linux SD card booting Hi Bishnu, Rocketboards is being decommissioned. We have a new site: Please refer to: https://altera-fpga.github.io/rel-26.1/ https://altera-fpga.github.io/rel-26.1/embedded-designs/stratix-10/sx/soc/gsrd/ug-gsrd-s10sx-soc/ Regards, Sue Re: Agilex 5 premium board - es version - boots with gibberish prompts Thanks for letting us know what the solution was. I'm glad you solved it! Sue Re: SoC EDS, compile uboot for Arria 10 SoC Hi Pete, We haven't used SoCEDS in a long time. Please study the Arria 10 Golden System Reference Design: https://altera-fpga.github.io/rel-26.1/embedded-designs/arria-10/sx/soc/gsrd/ug-gsrd-a10sx-soc/ That should help! Sue