Honored ContributorHello,
I'm trying to read a single frame from the RAM using the VIP_Frame_Reader and NIOS2. I know the frame reader creates an interrupt each time it finish of read one frame but I don´t know how to handle the interruption from the C code or if there some easier way to do what I want. Best regards, Rafael
Honored ContributorHello,
Download the following example design: http://www.alterawiki.com/wiki/altera%27s_video_and_image_processing_suite_demo_on_the_neek There is some Nios C++ code to use the VIP Frame Reader and also an example to register ISRs in Vipcore.hpp (build_tool_software/app/neek_vip_demo/src/Vip_ctrl/)Honored ContributorThank you, I was checking this example and I find the way to get the interrupts.
Now I have other problem with this module. After stop the module, if I make any modification in the memory and I try to start the module again the output image becomes corrupted. (I'm sure in the memory the image is correct).Honored ContributorHello, after read a lot of information about Nios 2 and fpgas, my project is almost finished but I still having problems with the FrameReader.
My project takes a frame from an Avalon ST video and stores it in ddr memory, after that one custom instruction perform a some modifications over the frame in memory and finally the FrameReader should read the frame from memory and give it to one Clocked Video Output connected to NEEK LCD. The frame is correctly stored in memory but when I try to show it in the LCD, the frame is showed for a moment and after that I got a black-screen. May anyone help me?. The FrameReader video output is connected directly (without any buffer) to the Clocked Video Output and the initialization code is: // Frame Select
IOWR(ALT_VIP_VFR_0_BASE, 3, 0);
// Frame 0 Base Address
IOWR(ALT_VIP_VFR_0_BASE, 4, &P);
// Frame 0 Words
IOWR(ALT_VIP_VFR_0_BASE, 5, 800*480);
// Frame 0 Single Cycle Color Patterns
IOWR(ALT_VIP_VFR_0_BASE, 6, 800*480);
// Frame 0 Width
IOWR(ALT_VIP_VFR_0_BASE, 8, 800);
// Frame 0 Height
IOWR(ALT_VIP_VFR_0_BASE, 9, 480);
// Frame 0 Interlaced
IOWR(ALT_VIP_VFR_0_BASE, 10, 3);
// start Frame Reader
IOWR(ALT_VIP_VFR_0_BASE, 0, 1);
You might want to upload your C file that is controlling it.
And show how your are using the VIP frame reader. Also post a picture of your SOPC/QSYS system. Take a look at this application note: http://www.altera.com/literature/an/an427.pdf And see how they are using the frame readers in it. I think this is the link to the code in the app note: https://www.altera.com/support/software/download/refdesigns/broadcast/dnl-post-process.jspHonored ContributorThank you for reply.
The Qsys is divided in 3 subsystems DetectionSystem: This system has the CI used to load and modify the frame in memory VideoSystem: This system has the VIP IP. The IP between the FrameReader and the ITC removes the alfa channel from the pixeles. The pixeles are stored in argb in parallel 8 bits per colour channel. MainSysten: Contains the cpu, ram controller, etc. In the attached zip there screen shoots of the system, the QuitaAlpha source and the c program. update 1: After a few checks, I discover that if I connect the cpu to ssram and the frame reader to sdram, the problem becomes fixed but I would like that both stay connected to the sdram.Honored ContributorI still having problems with this. When I add the ssram to my project I setup it to work the frame reader still not working.
