Forum Discussion
Altera_Forum
Honored Contributor
16 years agoVideo Clocked output and VGA
Hi all.
I am using a DE2 , and I am trying to show RGB test pattern generator on the VGA. I am using vip to genereate the colour bars, but i have not benn able to fully understand the way VCO works. Can I use it to pilot the VGA output, or I need first a frame buffer or something similar? I've read all the datasheets i could, but i haven't been able to find an answer.51 Replies
- Altera_Forum
Honored Contributor
my fault.
reading this, http://www.altera.com/literature/hb/qts/qts_qii54006.pdf?gsa_pos=12&wt.oss_r=1&wt.oss=sdr%20sdram Altera says that "The SDR SDRAM controller acts as a bridge between the system interconnect fabric and the pins on an SDRAM device. The SDR SDRAM controller can operate in excess of 100 MHz." So, your considerations were rigth: we can work with SDR SDRAM up to 100MHz. Bandwidth is different, right now: available band is 16*100mhz= 1.6gb/s - Altera_Forum
Honored Contributor
i used ur setting for my framebuffer..unfortunately it didnt work..i still get flickered output as shown in previous post..
http://www.alteraforum.com/forum/showpost.php?p=88736&postcount=25 here is my current setting for framebuffer.. https://www.alteraforum.com/forum/attachment.php?attachmentid=2420 I have a DE2 board as yours too..mybe i will try on it usnig ur setting and post the results here cheers, suki - Altera_Forum
Honored Contributor
Did you try to set base adresses of the framebuffer at all 0?
- Altera_Forum
Honored Contributor
--- Quote Start --- Did you try to set base adresses of the framebuffer at all 0? --- Quote End --- i think that base address depends on the base address of sdram in sopc..my sdram base is at 0x02000000. Correct me if i understand it wrong..:confused: - Altera_Forum
Honored Contributor
I thought that base address is the offset in the sdram where data are going to be stored. 0x0s means @start from the first column, first row, etc etc etc.
0x020000000 means start from the 33554432 bit free.. - Altera_Forum
Honored Contributor
--- Quote Start --- I thought that base address is the offset in the sdram where data are going to be stored. 0x0s means @start from the first column, first row, etc etc etc. 0x020000000 means start from the 33554432 bit free.. --- Quote End --- ic.. so ive misunderstood it..:D i'll try change it to 0x000000..thanks - Altera_Forum
Honored Contributor
one last consideration...
96 16 48 2 11 32 are the settings for VGA @ 75hz. if you want to use THIS resolution, you should set your pixel clock for the vga @ 31.5MHz Greetings Phate :) - Altera_Forum
Honored Contributor
--- Quote Start --- ic.. so ive misunderstood it..:D i'll try change it to 0x000000..thanks --- Quote End --- ive change it..sumhow changing the framebuffer base address doesnt fix it..it still flicker..wonder why.. - Altera_Forum
Honored Contributor
hem.. how many bit per color plane are you using in tp generator?
my setings are made up for 5 bit per color plane, so try to set the test pattern to generate a signal rgb 444 with 5 bits per color plane. It should work. Let me know greetings Phate - Altera_Forum
Honored Contributor
Just one info/help question:
It seems that in quartus2 9.1 sp1 VIP do not work well. Anyone knows if in quartus2 9.1 sp2 any issues have been fixed? Or, when can i find vip for 9.0 version of quartus2 9.0, if I would downgrade my current version?