Altera_Forum
Honored Contributor
16 years agoUSB 2.0 core problem
Hi all,
I am having some troubles with the USB2.0HR core from SLS corp. I am using the USB2.0HR version 2.2 on Quartus II 8.1. I successfully created the NIOS II sopc and loaded into the Cyclone III. I opened the example program portinterface in the NIOS II IDE. I compiled it and loaded that into the FPGA. I can see the "USB open successfully" message showing up. However, when I connect the board to the PC. The PC says the "USB Device is not recognized". And the VID and PID are 0x0000 as shown in the device manager. I am sure the signal lines are connected correctly between the FPGA and the Phy device. And I can see the 60MHz Phy clock coming out. So what else could go wrong? thanks