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Altera_Forum's avatar
Altera_Forum
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16 years ago

Is the pin assignment changing right?

Hi,

I have designed a ddr2 interface using StratixII, and been confused about pin assignment.

The IP Core Tool Bench assigned the pins for ddr2 sdram automatically. In order to make the PCB routing more easier, I changed the assignment.

I still located the dq, dqs and dm to their dedicated pins, and just modify their order. So, the pin assignment order is different from the order generated by IP Core Tool Bench.

Did this change right, and would the curcuit still working?

Did this change harm the DDR2 Controller's performance?

Thanks a lot!

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    I still located the dq, dqs and dm to their dedicated pins, and just modify their order.

    --- Quote End ---

    You have to keep the integrity of the DQS groups. The DQ pins within a group, as well as the groups and the dm and address pins can be exchanged.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Thank you very much!

    I had maken a mistake that the Dq pins I changed was not in the same Dqs group.

    I didn't read the StratixII handbook word by word.

    Thanks for you reply.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Address pins can be exchanged? The initialization needs to use the address pins. If the order changes, will the initiall parameter be wrong?

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    Address pins can be exchanged? The initialization needs to use the address pins. If the order changes, will the initiall parameter be wrong?

    --- Quote End ---

    Sorry, I didn't understand the "initialization".

    When ,where and what to init?
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    herezt is refering to the fact, that the RAM address pins must be connected in the correct order, otherwise the RAM controller can't work. This wasn't doubted at all, because the discussion was regarding changes to the pin placement, not changing the pin assignment between RAM and RAM controller.