Is it possible two DDR2 controller use the same PLL?

Hi,

I wonder that if two DDR2 controller can share a PLL on a CYIII. For example, Run a PLL outputting 166MHz for two DDR2 controller.

I noticed that a option called "use clocks from another controller" under the tab called "controller setting" in the "DDR2 High Performance Controller", and when selecting it, a message below pops up. I have copied it here.

"Info: After Quartus Compilation, check the "PLL Usage" report to make sure that the PLL outputs are merged correctly. Your master controller (altmemddr_0) should have two more PLL related clocks than your (altmemddr_1) controller (this report is in "Compilation Report > Fitter > Resource Section")."

Is it possible?

Please give my some hints, thanks a lot!