Is it possible two DDR2 controller use the same PLL?

Question

Hi,

I wonder that if two DDR2 controller can share a PLL on a CYIII. For example, Run a PLL outputting 166MHz for two DDR2 controller.

I noticed that a option called "use clocks from another controller" under the tab called "controller setting" in the "DDR2 High Performance Controller", and when selecting it, a message below pops up. I have copied it here.

"Info: After Quartus Compilation, check the "PLL Usage" report to make sure that the PLL outputs are merged correctly. Your master controller (altmemddr_0) should have two more PLL related clocks than your (altmemddr_1) controller (this report is in "Compilation Report > Fitter > Resource Section")."

Is it possible?

Please give my some hints, thanks a lot!

altera_forum · Answer

Sharing PLLs is possible, as long as the frequency is the same. Just select the option and wire up the other PLL to it in the RTL

altera_forum · Answer

--- Quote Start ---

Sharing PLLs is possible, as long as the frequency is the same. Just select the option and wire up the other PLL to it in the RTL

--- Quote End ---

Hi,

Thanks for reply!

I understand your point, but how to wire up?

Is there any docs on this subject I may refer to?

Thanks again!

altera_forum · Answer

Here is the external memory handbook  http://www.altera.com/literature/lit-external-memory-interface.jsp

altera_forum · Answer

--- Quote Start ---

Here is the external memory handbook

http://www.altera.com/literature/lit-external-memory-interface.jsp

--- Quote End ---

Hi, std_logic

Thanks a lot for the link!

I will check it out.

Thanks again!

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Is it possible two DDR2 controller use the same PLL?

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