I have a basic question about Quartus tcl command "get_fanins". so I noticed that there are many options for this command and I'm confused which option should I use?

What u can do is use the tecnology map viewer to look into the netlist.

-asynch Traverse through asynch edges, this normal happened on after LUT1 where no clock involve.

-synch Traverse through synch edges, usually, on the register where clock is involve.

-clock Traverse through clock edges, on the clock path rather than the data path. for example, output of PLL.

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/tafs/tafs/tcl_pkg_sdc_ext_ver_1.0_cmd_get_fanins.htm

Does the above link help?

The definitions are not clear

-asynch Traverse through asynch edges

-clock Traverse through clock edges

-synch Traverse through synch edges

So for example I created this test case:

I get the fanins of the "In_pin" input using "-async" , "-sync" and "-clock" option and I get no difference between the 3 results.

So how can I see the difference between these options in a design?

Thanks