FFT Source_valid

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..

after transfering some data packages, the sink_valid kept high, no sink/source_errors, the core should assert the "source_valid" high - but it isn't.

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why do you say there are no errors? it clearly shows source_error=1 which means missing sop. Recheck you sop eop, they should be one clock long and correctly spaced. To improve your test validity you should really put some data !=0. DC or just put random pattern.

Edit:[Be aware that the very first input sample having sink_valid=1, sink_ready=1 MUST also have SOP=1, otherwise you get missing sop]

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finally it works, i only got it running when the "generate a clk_ena pin" is checked (in the mega wizard fft generation tool)

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Hi, Luis_Altera,

I am having the same problem with you. Could you please tell me more specifically on where to check the "generate a clk_ena pin"? I am using Quartus II 9.0 sp2.

Thanks a million!

Hello,

i am using quartus 8.1 but i think there is no difference. you will find the

"Global Clock Enable" checkbox at "Step 1: Parametrize" -> "Implementation Options". Hope that will help you.

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Hello,

i am using quartus 8.1 but i think there is no difference. you will find the

"Global Clock Enable" checkbox at "Step 1: Parametrize" -> "Implementation Options". Hope that will help you.

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Hello, Thank you very much.

I don't quite understand why inserting such a signal would make such a difference? It seems like an optional signal.

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yes that's true, but if i don't insert it it defenitly does not work. so is your design working now?

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Hello, I am now trying to simulate and view the results. However, the simulation has taken my twenty minutes but still stuck at 53%. How could it be?

My clock periods are 10ns and 20ns. I have set my simulation time to 2ms. Is it because the time interval is too long? But my fft has to taken 64 data for one output data excluding the latency.

How long did you wait for your results to come out?

regards

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Hi, Luis_Altera,

I am having the same problem with you. Could you please tell me more specifically on where to check the "generate a clk_ena pin"? I am using Quartus II 9.0 sp2.

Thanks a million!

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Hello,

I am using Quartus II 9.0 too.I have got my data,but the source_valid is always low.I don't know how to find the "Global Clock Enable".I saw the word "Step 1: Parametrize" -> "Implementation Options",but can you tell me where is the "Parametrize"? And if you can tell me what cause the source_error,it will be better . My english isn't good but I hope you can understand my mean . my box :hanyang-sheep@163.com. I hope to receive you message.Please send mail to my box:hanyang-sheep@163.com .