Rtemple
New Contributor
5 years agoFFT IP core sink_ready never gets asserted
I'm attempting to simulate the FFT IIP core, using buffered burst mode. However, sink_ready never gets asserted
I would expect sink_ready to go high, as soon as reset is de-asserted (set to 1), as per the datasheet
Perhaps I am not simulating the fft ip correctly? After running RTL Simulation and Modelsim is loaded, I close the simulation Modelsim initially loads (I don't understand what to do with the initial simulation as it has no stimulus?). I then load my own testbench which is included in the project.
I've attached an archive of my project.
Thanks for reading