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Rtemple's avatar
Rtemple
Icon for New Contributor rankNew Contributor
6 years ago

FFT IP core sink_ready never gets asserted

I'm attempting to simulate the FFT IIP core, using buffered burst mode. However, sink_ready never gets asserted I would expect sink_ready to go high, as soon as reset is de-asserted (set to 1), ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

As I understand it, you observe some issue when trying to perform simulation with FFT IP. I have tried to look into your attached QAR but not sure the step to run the simulation to reproduce your observation. Would you mind to share with me your simulation ZIP folder as well as detailed steps to perform simulation and replicate your observation in Modelsim?

Thank you very much.

Rtemple's avatar
Rtemple
Icon for New Contributor rankNew Contributor
6 years ago

Thanks for your response. I've decided to just simulate using signal tap instead as I've been having too many problems with altera-modelsim