Example DSP Builder FFT megacore V7.1

Reto,

I found a few things:

- the simulation wasnt long enough to see the results coming out. You had the simulation running for 600 clocks on a 1024 point FFT, you'll need at least 3X the FFT size to account for the latency.

- the EOP and SOP packets were misformed. You should only assert for 1 clock and the SOP and EOP should be 1023 clocks away and then repeat every 1024 clocks.

I've fixed the simulation and attached it. You'll need to regenerate the megacore of course.

:)

blk