Model { Name "test_ohne_clk_ena" Version 6.6 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.92" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off InitFcn "%% DSPBuilder Start\nalt_dspbuilder_update_model(bd" "root)\n%% DSPBuilder End\n" Created "Wed Aug 15 09:30:15 2007" Creator "mbi" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "bkurtz" ModifiedDateFormat "%" LastModifiedDate "Mon Aug 20 10:32:20 2007" ModelVersionFormat "1.%" ConfigurationManager "None" SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" AccelVerboseBuild off TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ProdHWDeviceType "32-bit Generic" ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.2.0" Array { Type "Handle" Dimension 7 Simulink.SolverCC { $ObjectID 2 Version "1.2.0" StartTime "0.0" StopTime "4000" AbsTol "auto" FixedStep "20e-9" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "VariableStepDiscrete" SolverName "VariableStepDiscrete" ZeroCrossControl "UseLocalSettings" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" RateTranMode "Deterministic" Array { Type "Struct" Dimension 1 MATStruct { SampleTime "20e-9" Offset "0" Priority [0.0] } PropName "SampleTimeProperty" } } Simulink.DataIOCC { $ObjectID 3 Version "1.2.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Array { Type "Cell" Dimension 5 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "InitFltsAndDblsToZero" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } Version "1.2.0" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnforceIntegerDowncast on ExpressionFolding on ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary on } Simulink.DebuggingCC { $ObjectID 5 Version "1.2.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "Warning" } Simulink.HardwareCC { $ObjectID 6 Version "1.2.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.2.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 1 Cell "IncludeHyperlinkInReport" PropName "DisabledProps" } Version "1.2.0" SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Array { Type "Cell" Dimension 16 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" PropName "DisabledProps" } Version "1.2.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off PrefixModelToSubsysFcnNames on MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 15 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlComp" "liant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } Version "1.2.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType Clock DisplayTime off } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType SignalViewerScope Floating off ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "0" Disabled off ScrollMode on } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" } Block { BlockType Sin SineType "Time based" TimeSource "Use simulation time" Amplitude "1" Bias "0" Frequency "1" Phase "0" Samples "10" Offset "0" SampleTime "-1" VectorParams1D on } Block { BlockType Terminator } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Arial" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "test_ohne_clk_ena" Location [2, 76, 1278, 970] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "90" ReportName "simulink-default.rpt" Block { BlockType Reference Name "Constant" Ports [0, 1] Position [390, 411, 440, 429] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Constant" SourceType "Constant AlteraBlockset" mask_cst "1" BusType "Single Bit" bwl "8" bwr "0" SpecifyClock off clock "clk_sys" } Block { BlockType Reference Name "Constant1" Ports [0, 1] Position [420, 171, 470, 189] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Constant" SourceType "Constant AlteraBlockset" mask_cst "0" BusType "Single Bit" bwl "8" bwr "0" SpecifyClock off clock "clk_sys" } Block { BlockType Reference Name "Constant3" Ports [0, 1] Position [430, 276, 480, 294] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Constant" SourceType "Constant AlteraBlockset" mask_cst "0" BusType "Signed Integer" bwl "2" bwr "0" SpecifyClock off clock "clk_sys" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator\nEOP" Ports [0, 1] Position [20, 263, 65, 297] Period "1024" PhaseDelay "1028" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator\nReset" Ports [0, 1] Position [20, 563, 65, 597] Period "10004" PulseWidth "10000" PhaseDelay "4" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator\nSOP" Ports [0, 1] Position [25, 343, 70, 377] Period "1024" PhaseDelay "5" } Block { BlockType Scope Name "Scope" Ports [9] Position [1300, 281, 1405, 449] Floating off Location [5, 34, 1289, 1012] Open on NumInputPorts "9" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" } YMin "0~0~0~-1~-5~-5~-5~-5~-1.65495" YMax "1~1~1~1~5~5~5~5~4.32935" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Signal Compiler" Ports [] Position [190, 640, 259, 687] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Signal Compiler" SourceType "Signal Compiler AlteraBlockset" DeviceFamily "Cyclone II" DeviceName "AUTO" EnableSignalTap off SignalTapDepth "128" UseBoardBlock off StpUseDefaultClock on StpClock "clk_sys" } Block { BlockType Sin Name "Sine Wave" Ports [0, 1] Position [35, 175, 65, 205] SineType "Sample based" Amplitude "2000" Samples "100" SampleTime "01" } Block { BlockType Terminator Name "Terminator" Position [945, 205, 965, 225] } Block { BlockType Terminator Name "Terminator2" Position [945, 275, 965, 295] } Block { BlockType Terminator Name "Terminator3" Position [945, 310, 965, 330] } Block { BlockType Reference Name "fft_v7_1" Ports [9, 8] Position [535, 157, 890, 443] ForegroundColor "blue" DropShadow on SourceBlock "megacorefunctions_alteradspbuilder2/MegaCore" SourceType "fft" entityName "fft_v7_1_import" inNames "inverse reset_n sink_eop sink_error sink_imag s" "ink_real sink_sop sink_valid source_ready " inBwls "1 1 1 2 18 18 1 1 1" inBwrs "0 0 0 0 0 0 0 0 0" inTypes "b b b s s s b b b " inDelayed "1 0 1 1 1 1 1 1 1" outNames "sink_ready source_eop source_error source_exp s" "ource_imag source_real source_sop source_valid " outBwls "1 1 2 6 18 18 1 1" outBwrs "0 0 0 0 0 0 0 0" outTypes "b b s s s s b b " xmlmapfile "c:\\altera\\71\\quartus\\dsp_builder\\SimgenCMa" "p.xml" is_megacore "on" use_dynamic_feedthrough_data "on" vofile "DSPBuilder_test_ohne_clk_ena_import\\fft_v7_1.v" "o" n_input_port "9" n_output_port "8" core_dir "C:\\altera\\71\\ip\\fft\\lib\\ip_toolbench" core_name "fft" clockname "clk" flow_dir "C:\\altera\\71\\ip\\fft\\lib\\../../common/ip_t" "oolbench/v1.3.0/bin" core_version "7.1" NewVariation "off" VhdlVariationDate "20-Aug-2007 10:18:48" VhdlVariationName "C:\\DOCUME~1\\bkurtz\\LOCALS~1\\Temp\\DSPBuilde" "r_test_ohne_clk_ena_import\\fft_v7_1.vhd" use_systemC_model "off" wizard "fft" inptype "bbbsssbbb" outptype "bbssssbb" Port { PortNumber 1 Name "sink_ready" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "source error" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "fft out" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "source_SOP" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "source_valid" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "isv16_audio_data_in" Ports [1, 1] Position [105, 182, 170, 198] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Input" SourceType "Input AlteraBlockset" iofile "C:\\Documents and Settings\\bkurtz\\Desktop\\tb" "_test_ohne_clk_ena\\test_ohne_clk_ena_isv16_audio_data_in.salt" BusType "Signed Integer" bwl "16" bwr "0" SpecifyClock off clock "clk_sys" PORTTYPE "Input" Port { PortNumber 1 Name "data in orig" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "pop" Ports [1, 1] Position [110, 352, 175, 368] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Input" SourceType "Input AlteraBlockset" iofile "C:\\Documents and Settings\\bkurtz\\Desktop\\tb" "_test_ohne_clk_ena\\test_ohne_clk_ena_pop.salt" BusType "Single Bit" bwl "1" bwr "0" SpecifyClock off PORTTYPE "Input" Port { PortNumber 1 Name "SOP" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "pop1" Ports [1, 1] Position [105, 232, 170, 248] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Input" SourceType "Input AlteraBlockset" iofile "C:\\Documents and Settings\\bkurtz\\Desktop\\tb" "_test_ohne_clk_ena\\test_ohne_clk_ena_pop1.salt" BusType "Single Bit" bwl "1" bwr "0" SpecifyClock off PORTTYPE "Input" Port { PortNumber 1 Name "EOP" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "pop3" Ports [1, 1] Position [125, 572, 190, 588] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Input" SourceType "Input AlteraBlockset" iofile "C:\\Documents and Settings\\bkurtz\\Desktop\\tb" "_test_ohne_clk_ena\\test_ohne_clk_ena_pop3.salt" BusType "Single Bit" bwl "1" bwr "0" SpecifyClock off PORTTYPE "Input" Port { PortNumber 1 Name "reset" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Clock Name "Clock" Position [220, 445, 240, 465] IOType "siggen" Decimation "10" } Block { BlockType SignalViewerScope Name "Scope1" Ports [] Position [20, 15, 60, 55] IOType "viewer" Location [742, 434, 1066, 673] Open off NumInputPorts "1" List { ListType AxesTitles axes1 "%" } ShowDataMarkers off ShowLegends off DataFormat "Array" MaxDataPoints "7500" RefreshTime 0.035000 Disabled off } Line { Labels [0, 0] SrcBlock "Sine Wave" SrcPort 1 DstBlock "isv16_audio_data_in" DstPort 1 } Line { Name "data in orig" Labels [0, 0] SrcBlock "isv16_audio_data_in" SrcPort 1 Points [55, 0] Branch { Points [0, 140] DstBlock "fft_v7_1" DstPort 6 } Branch { Labels [2, 0] Points [0, -65; 1050, 0; 0, 160] DstBlock "Scope" DstPort 1 } } Line { Name "sink_ready" Labels [0, 1] SrcBlock "fft_v7_1" SrcPort 1 Points [250, 0; 0, 185] DstBlock "Scope" DstPort 5 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "fft_v7_1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [15, 0] Branch { DstBlock "fft_v7_1" DstPort 9 } Branch { Points [0, -30] DstBlock "fft_v7_1" DstPort 8 } } Line { SrcBlock "Pulse\nGenerator\nEOP" SrcPort 1 Points [20, 0] DstBlock "pop1" DstPort 1 } Line { Name "EOP" Labels [1, 1] SrcBlock "pop1" SrcPort 1 Points [160, 0] Branch { DstBlock "fft_v7_1" DstPort 3 } Branch { Labels [2, 0] Points [0, 245; 910, 0; 0, -160] DstBlock "Scope" DstPort 3 } } Line { Name "SOP" Labels [0, 0] SrcBlock "pop" SrcPort 1 Points [125, 0] Branch { DstBlock "fft_v7_1" DstPort 7 } Branch { Points [0, 180; 895, 0; 0, -235] DstBlock "Scope" DstPort 2 } } Line { SrcBlock "Pulse\nGenerator\nSOP" SrcPort 1 DstBlock "pop" DstPort 1 } Line { SrcBlock "fft_v7_1" SrcPort 2 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "fft_v7_1" SrcPort 4 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "fft_v7_1" SrcPort 5 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 Points [25, 0] Branch { Points [0, 15] DstBlock "fft_v7_1" DstPort 5 } Branch { Points [0, -15] DstBlock "fft_v7_1" DstPort 4 } } Line { Name "source_SOP" Labels [1, 0] SrcBlock "fft_v7_1" SrcPort 7 Points [390, 0] DstBlock "Scope" DstPort 6 } Line { Name "fft out" Labels [0, 0] SrcBlock "fft_v7_1" SrcPort 6 Points [100, 0; 0, 50] DstBlock "Scope" DstPort 7 } Line { Name "source error" Labels [0, 0] SrcBlock "fft_v7_1" SrcPort 3 Points [215, 0; 0, 95] DstBlock "Scope" DstPort 4 } Line { Name "source_valid" Labels [0, 0] SrcBlock "fft_v7_1" SrcPort 8 DstBlock "Scope" DstPort 8 } Line { SrcBlock "Pulse\nGenerator\nReset" SrcPort 1 DstBlock "pop3" DstPort 1 } Line { Name "reset" Labels [0, 0] SrcBlock "pop3" SrcPort 1 Points [180, 0] Branch { Points [0, -370] DstBlock "fft_v7_1" DstPort 2 } Branch { Labels [1, 0] Points [900, 0; 0, -135] DstBlock "Scope" DstPort 9 } } } }