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gavin5342's avatar
gavin5342
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7 months ago
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Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV during Arria 10 PCIe hip simulation

I have generated an Arria 10 PCI Express testbench system using Platform Designer in ACDS 24.3.

When I come to simulate this system using the generated msim_setup.tcl script, I see this sort of message from each scfifo and ram:

# Time: 0 Instance: ellesmere_tb.ellesmere_inst.ellesmere_pcie.ellesmere_pcie.g_avmm.g_avmm.avalon_bridge.tx.genblk1.wrdat_fifo
# Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV.

The generated altpciexpav_stif_tx.v file sets intended_device_family to Stratix IV as shown in the snip below (I have also attached this file).

The function IS_VALID_FAMILY; in the altera_mf.v file from $QUARTUS_INSTALL_DIR/eda/sim_lib doesn't include "Stratix IV" in the list of valid devices.

altpciexpav_stif_tx.v:

begin
     
scfifo wrdat_fifo (
.rdreq (wrdat_fifo_rdreq),
.clock (Clk_i),
.wrreq (wrdat_fifo_wrreq),
.data (TxWriteData_i),
.usedw (wrdat_fifo_usedw),
.empty (),
.q (wr_datout),
.full () ,
.aclr (~Rstn_i),
.almost_empty (),
.almost_full (),
.sclr ()
);
defparam
wrdat_fifo.add_ram_output_register = "ON",
wrdat_fifo.intended_device_family = "Stratix IV",
wrdat_fifo.lpm_numwords = 64,
wrdat_fifo.lpm_showahead = "OFF",
wrdat_fifo.lpm_type = "scfifo",
wrdat_fifo.lpm_width = 64,
wrdat_fifo.lpm_widthu = 6,
wrdat_fifo.overflow_checking = "ON",
wrdat_fifo.underflow_checking = "ON",
wrdat_fifo.use_eab = "ON";

end
Pcie
  • VenT_Altera's avatar
    VenT_Altera
    7 months ago

    Hi gavin5342,


    My apologies for the late reply.

    Thank you for attaching the .ip file.


    I have generated the simulation files from the .ip file given and run the simulation in Questa Intel FPGA Edition-64 2024.1. I can replicate the error messages that you observed.


    Based on my findings, there are 7 instances that returned the comment of "# Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV.". This is reported because the INTENDED_DEVICE_FAMILY parameter was defined as Stratix IV, but it is not found in the IS_VALID_FAMILY function's list of device families.


    So, when the code performs a check on this function using the parameter INTENDED_DEVICE_FAMILY for the 7 instances, the error message is reported. I think our IP design team will reuse some proven RTL for the next generation of devices. Hence, your observation is expected.


    Additionally, with the message "# SUCCESS: Simulation stopped due to successful completion!", this indicates a successful simulation. Therefore, I think you can safely ignore the error comment.


    I hope this addresses your question. Please let me know if you have any further inquiries.


    Thanks.

    Best Regards,

    ventt


10 Replies

  • gavin5342's avatar
    gavin5342
    Icon for New Contributor rankNew Contributor
    7 months ago

    PS since this is just a $display, I can ignore it and the simulation continues as expected. it's just annoying to have messages that say "Error!" in my transcript.

  • VenT_Altera's avatar
    VenT_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    7 months ago

    Hi gavin5342,


    Thanks for reaching out.


    I understand that you were able to ignore the "Error" messages and complete the simulation successfully. Please address the following items to allow me to further investigate this issue:


    1. Is this AVST or AVMM? Please share the .ip that was used to generate the Design Example and simulation testbench.

    2. Please attach the complete transcript that contains the error messages.

    3. What is the Modelsim version used?


    Thanks.

    Best Regards,

    Ven


  • gavin5342's avatar
    gavin5342
    Icon for New Contributor rankNew Contributor
    7 months ago

    I'd recommend you try generating the IP from the .ip file. If you see the same thing that I do, you will find instantiations of scfifo with.intended_device_family = "Stratix IV" inn both

    ellesmere_pcie/altera_pcie_a10_hip_2020/sim/altpciexpav_stif_tx.v

    and

    ellesmere_pcie/altera_pcie_a10_hip_2020/synth/altpciexpav_stif_tx.v

    Thanks,
    Gavin

    • VenT_Altera's avatar
      VenT_Altera
      Icon for Frequent Contributor rankFrequent Contributor
      7 months ago

      Attaching the screenshot of the error message: 

  • VenT_Altera's avatar
    VenT_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    7 months ago

    Hi gavin5342,


    My apologies for the late reply.

    Thank you for attaching the .ip file.


    I have generated the simulation files from the .ip file given and run the simulation in Questa Intel FPGA Edition-64 2024.1. I can replicate the error messages that you observed.


    Based on my findings, there are 7 instances that returned the comment of "# Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV.". This is reported because the INTENDED_DEVICE_FAMILY parameter was defined as Stratix IV, but it is not found in the IS_VALID_FAMILY function's list of device families.


    So, when the code performs a check on this function using the parameter INTENDED_DEVICE_FAMILY for the 7 instances, the error message is reported. I think our IP design team will reuse some proven RTL for the next generation of devices. Hence, your observation is expected.


    Additionally, with the message "# SUCCESS: Simulation stopped due to successful completion!", this indicates a successful simulation. Therefore, I think you can safely ignore the error comment.


    I hope this addresses your question. Please let me know if you have any further inquiries.


    Thanks.

    Best Regards,

    ventt


  • VenT_Altera's avatar
    VenT_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    6 months ago

    Hi gavin5342,


    Good day to you.

    May I know if you have any further questions about my previous message?


    Please feel free to reach out if you require any assistance from me.


    Thanks.

    Best Regards,

    Ven Ting


  • VenT_Altera's avatar
    VenT_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    6 months ago

    Hi gavin5342,


    As there are no further inquiries, I will transition this thread to community support.

    If you have a new question, feel free to open a new thread to get support from Altera experts.

    Thanks.

    Best Regards,

    Ven Ting


  • gavin5342's avatar
    gavin5342
    Icon for New Contributor rankNew Contributor
    6 months ago

    Sorry for the delay Ven. Yes, I agree that I can safely ignore the message, it's just annoying that the auto-generated files put me into the situation where I need to ignore spurious errors.

    A couple of ways you could make things easier for the future:

    1) Update the PCIe tbed so that it doesn't specify Stratix IV any longer

    2) Update altera_mf.v so that it accepts Stratix IV even though Stratix IV is not supported by Quartus Pro

    Thanks for your help,
    Gavin

    • VenT_Altera's avatar
      VenT_Altera
      Icon for Frequent Contributor rankFrequent Contributor
      6 months ago

      Hi @gavin5342 ,

      Thanks for your reply and the feedback.
      I agree with you that the warning message can be annoying, even though we know it causes no harm.

      I will provide your feedback to the internal team.
      Kindly note that the ultimate decision to implement the changes lies with the internal team.

      We appreciate your feedback. Have a good day!

      Thanks.
      Best Regards,
      Ven Ting