gavin5342
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platform designer how to add -L argument to -makelib line in get_design_files using _hw.tcl
If I make a Platform Designer module with a _hw.tcl file, there doesn't seem to be a way to make PD add a -L argument to the -makelib line in get_design_files. It seems I must add all the files with packages that I use to the library for that module using add_fileset (like the Avalon verification IPs do). Have I missed something, because I would rather compile a package once and then refer to it during compilation using -L? Thanks, GavinSolved1.2KViews0likes3CommentsRe: quartus/eda/sim_lib/mentor/cyclone10gx_hssi_atoms_ncrypt.v(40): (vlog-2163) Macro `<protected> is un
I tried a bit more debugging on this, on the particular computer I was using, the active-diretcory setup was causing problems for the user I was logged in as. The problem was when logged in as an AD user, winbind libraries were getting called: libwinbind-client.so.0. I ended up using docker to fix things. For me, letting docker use my x server was OK, so this worked for me: xhost +local:docker docker run -e DISPLAY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix... with the above, I can still use Questa in interactive mode.1.1KViews0likes0CommentsReliability report
I am trying to access the reliability report, here:https://www.intel.com/content/www/us/en/secure/content-details/817705/programmable-solutions-group-psg-reliability-monitoring-report.html, but when I click download, I see the message below. Could you give me access to the reliability report, please? I am specifically interested in Cyclone 10 GX. Thanks, Gavin Oops, something went wrong! The page you requested has moved or doesn't exist. If you followed a link, it's probably broken - but don't worry, we've already reported it. In the meantime, why not take a look around?776Views0likes1CommentRe: Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV during Arria 10 PCIe hip simulation
Sorry for the delay Ven. Yes, I agree that I can safely ignore the message, it's just annoying that the auto-generated files put me into the situation where I need to ignore spurious errors. A couple of ways you could make things easier for the future: 1) Update the PCIe tbed so that it doesn't specify Stratix IV any longer 2) Update altera_mf.v so that it accepts Stratix IV even though Stratix IV is not supported by Quartus Pro Thanks for your help, Gavin1.2KViews0likes1CommentRe: Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV during Arria 10 PCIe hip simulation
I'd recommend you try generating the IP from the .ip file. If you see the same thing that I do, you will find instantiations of scfifo with.intended_device_family = "Stratix IV" inn both ellesmere_pcie/altera_pcie_a10_hip_2020/sim/altpciexpav_stif_tx.v and ellesmere_pcie/altera_pcie_a10_hip_2020/synth/altpciexpav_stif_tx.v Thanks, Gavin1.9KViews0likes1CommentError! Unknown INTENDED_DEVICE_FAMILY=Stratix IV during Arria 10 PCIe hip simulation
I have generated an Arria 10 PCI Express testbench system using Platform Designer in ACDS 24.3. When I come to simulate this system using the generated msim_setup.tcl script, I see this sort of message from each scfifo and ram: # Time: 0 Instance: ellesmere_tb.ellesmere_inst.ellesmere_pcie.ellesmere_pcie.g_avmm.g_avmm.avalon_bridge.tx.genblk1.wrdat_fifo # Error! Unknown INTENDED_DEVICE_FAMILY=Stratix IV. The generated altpciexpav_stif_tx.v file sets intended_device_family to Stratix IV as shown in the snip below (I have also attached this file). The function IS_VALID_FAMILY; in the altera_mf.v file from $QUARTUS_INSTALL_DIR/eda/sim_lib doesn't include "Stratix IV" in the list of valid devices. altpciexpav_stif_tx.v: begin scfifo wrdat_fifo ( .rdreq (wrdat_fifo_rdreq), .clock (Clk_i), .wrreq (wrdat_fifo_wrreq), .data (TxWriteData_i), .usedw (wrdat_fifo_usedw), .empty (), .q (wr_datout), .full () , .aclr (~Rstn_i), .almost_empty (), .almost_full (), .sclr () ); defparam wrdat_fifo.add_ram_output_register = "ON", wrdat_fifo.intended_device_family = "Stratix IV", wrdat_fifo.lpm_numwords = 64, wrdat_fifo.lpm_showahead = "OFF", wrdat_fifo.lpm_type = "scfifo", wrdat_fifo.lpm_width = 64, wrdat_fifo.lpm_widthu = 6, wrdat_fifo.overflow_checking = "ON", wrdat_fifo.underflow_checking = "ON", wrdat_fifo.use_eab = "ON"; endSolved2KViews0likes10Comments