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9 years agoError compiling Altera Uart 16550 IP Core Cyclone V
Hello,
+ Quartus 17 Prime Lite edition + Windows 7 64 bits + Altera 16550 Compatible UART I'm trying to use this module via avalon/axi bus. I added the module via qsys with no problems and I compiled a C software using the HWLIB and SoCAL libraries delivered by Altera. When I try to compile the project I get this error:Error (210039): File xxxxxx/de10nano_uart_16550/quartus/output_files/led_test_time_limited.sof contains one or more time-limited megafunctions that support the OpenCore Plus feature that will not work after the hardware evaluation time expires. Refer to the Messages window for evaluation time details.
I understand what the error means but I think there is a mistake here given that I'm using the IP Cores delivered with Quartus and no other sources, besides there is no info on the documentation[1] about this megafunction being limited or how can we buy it. It generates a limited sof file which works OK while being connected but some implementations are not working (like FIFO) This is the first time I get a problem using Qsys + IP cores so I guess it is a bug on Quartus ? [1] Altera Corporation. (2017). Embedded Peripherals IP User Guide. Altera Documentation, (June), 358.