DDR2 HP Controler -- need some help!

Hello,

I'm trying to use DDR2 HP v8.0 controler.

I've a stratix II PCIe dev board with 5 memory chips on it. Total memory is 288 Mo.

I generate DDR2 HP with megawizard, native interface, half rate and build some logic around to control it (generate write_request, read_request, datas, monitoring wdata_request and so on)

I am able to write or read in my memory but only continously! I can't make one write (understand one pulse on write_request with the corresponding datas, burst size, byte enable...) or one read (just one pulse on read_request with the correct address).

But if I let my write request pin high, I can write datas continously (except when ddr controler must make a refresh). Same thing with read operation. Only continous read. I can read back data I have write before.

Then, I make a state machine who generate signals. First, I make one write (during one cycle of clock), and after I make one read at the same address (during one clock too). It don't work.

The only way I find is to make write during 2 or 3 cycles of clock and just after make a read during 2 or 3 cycles of clock. But it don't work all the time...

Can someone could help me and tell me why I can read out data (or write data) correctly only if I do that continously ??

Please, if you need more details about my configuration or my code, tell me!

Thanks in advance.

Fabtrice.