Forum Discussion
Honored ContributorDAM with frame buffer and Clocked video output
Hello
In my design i am using Frame buffer that buffer video data in SDRAM and a Clocked video output IP in SOPC I need to integrate a DMA (direct memory access ) in my design between the frame buffer and the Clocked video output . If it's possible , how the connections should be made . Thank's for any further help .14 Replies
Altera_ForumPlz any help !!??
- Altera_Forum
Can you explain the question more?
The Frame Buffer takes the incoming data, buffers it and gives you an output, wich can be assigned to the CVO. You just connect the two and configure them accordingly your Input/Output. They are connected via Avalon-Bus then. (if you mean the FrameBuffer from VIP-Suite) What do you want to do? - Altera_Forum
The frame buffer use an external SDRAM to buffer video packets and then assign them to CVO as you said
My question is that i need to add a DMA (direct memory access) to that system to manage data . How could that be done ? Thank's for your help - Altera_Forum
OK, now it is clearer. I would not try to implement that on my own, because Altera provides components for that. (except you really have to implement it yourself for some case)
You can add some type of SDRAM-Controller. I normally take the easy controller instead of the highspeed one, because it is easier to configure. The highspeed controller needs clockbridge and pll, because you have to alter the phase of the clock according to your designs speed. So take a look at the SOPC-System I attached, I would design an easy output system to CVO like that. The configuration you must find out from the documentation of your dev-board. In Quartus you then add the pins to the SDRAM. (be aware, that dq is a bidir pin) Good Luck. - Altera_Forum
Thank you for your post .
i need to add an additional control core to that sopc that you have created : "DMA Controller' How could that be done ? - Altera_Forum
If it is really a controller you have written yourself, then the easiest way in my opinion is to implement the avalon-bus to it. The interface is quite easy to handle if you look into some example code. Search here in the forum like: http://www.alteraforum.com/forum/showthread.php?t=19053 You can then Import the HDL-File into the SOPC Wizard, wich creates you the needed .tcl File that inherits the interface description for the sopc. I think you could write that also by hand, but have not tried as the wizard worked fine here.
There are also hints in the forum. Try to search a bit. The idea to implement own code or connect external hardware to the nios is quite wide spread and is discussed here quite often before. Perhaps search for "Avalon" to get more information about implementing the bus and go get Alteras interface description. So far from me, good luck! (Edit: perhaps I am missing your question again. Try to describe more in detail then once again.) - Altera_Forum
Thanks for all your posts .
what i meant is using the DMA controller from altera that is a component in SOPC . - Altera_Forum
Ok, then I got it wrong. I haven't worked with that component so far. I assume you have looked into the documentation from altera. So I can't help you with that.
Have a nice weekend! Good luck! - Altera_Forum
I have seen, that you have made a new thread. So I thought about your project again and find, that I don't undestand, why you want to use the DMAController for accessing the SDRAM. When the FrameBuffer is using the RAM for Buffering the VideoData the SDRAM-Controller normally works fine. I am just curious, what do you want to achieve by using the DMA-Controller?
Thanks. - Altera_Forum
What i need is a fast manipulations between the Sdram and the clocked video output . I need to bypass the nios in controlling the write and the read .
Sorry but i am new in FPGA design , and i am working on an university project.
