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Altera_Forum
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15 years ago

DAM with frame buffer and Clocked video output

Hello In my design i am using Frame buffer that buffer video data in SDRAM and a Clocked video output IP in SOPC I need to integrate a DMA (direct memory access ) in my design between the fra...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

What i need is a fast manipulations between the Sdram and the clocked video output . I need to bypass the nios in controlling the write and the read .

Sorry but i am new in FPGA design , and i am working on an university project.