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Mikhail_a's avatar
Mikhail_a
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Bad timings for MSGDMA IP on Agilex 7 FPGA

Hello!

I have a design based on AGFB014R24B2E2V FPGA device. This design implements a simple general NIC functionality and PCIe for connection to the host. Design is clocked by PCIe user clock and it is 250 MHz. I use two MSGDMA IPs core for moving data to and from host memory (one for stream to MM translation and one for MM to stream). The problem is that according to timing report there are a plenty (~60k) of failing paths in MSGDMA IP. I've attached a piece of timing report and utilization report below.

So my question is are there any ways to fix those timing issues? I couldn't find any performance data for this IP so I cant even learn whether I can use it in my design or not.

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  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    I apologize for any inconvenience caused by the design functionality not meeting your requirements.


    Indeed, you are correct. Without changing the IP configuration setting to Aligned Mode, achieving timing closure with a 512-bit data width becomes very challenging, even with the design pipelined.

    Just fyi, though it may not be your desired functionality, it is still possible to meet timing requirements with a smaller 32-bit data width in unaligned mode.


    Best Regards,

    Richard Tan


  • Mikhail_a's avatar
    Mikhail_a
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Anyways thank you for your help. At least I was able to get rid of some timing issues.

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Thank you for the acknowledgment. Since there are no further questions regarding this case, I will transition this thread to community support.

    If you have any further questions or concerns, please don't hesitate to reach out. Thank you and have a great day!


    Best Regards,

    Richard Tan