Forum Discussion

RZhen11's avatar
RZhen11
Icon for Occasional Contributor rankOccasional Contributor
5 days ago

Arria 10 Transceiver rx_cal_busy always HIGH for 24s after programming

Troubleshooting 10G link native, the external TX is always ON. USRCLK 100MHz always ON.

Every time the FPGA is loaded through JTAG or cold boot, there is a 24sec something wait until rx_clk_busy goes to LOW then the link starts functioning normal.

According to Google AI, transceiver calibration module seems got stuck, and unfrozen by hardware watchdog to prevent brick.

We has a different product that establishes link almost immediately with the same transmitter.

Please suggest, thanks

Transceiver

1 Reply

  • Ash_R_Altera's avatar
    Ash_R_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 hours ago

    Hi,

    I am referring to the following section of the Arria 10 transceiver PHY UG, https://docs.altera.com/r/docs/683617/21.1/arria-10-transceiver-phy-user-guide/power-up-calibration

    As per this, the power-up calibration has a sequence and RX PMA channel calibration almost comes at the end of it. Eventually the rx_cal_busy de-assertion will depends upon the whether the previous blocks i.e. ATX PLL and fPLL calibration are completed or not and whether the PCIe hard IP is enabled or not.

    If the PLLs are taking long, check the input reference clocks to it.

     

    Regards