ALM structure

Hi,

F0 and F1 are lookup table (LUT). A lookup table (LUT) that implements an arbitrary Boolean function of N inputs is often referred to as an N-LUT check this document https://www.intel.com/content/www/us/en/docs/programmable/683152/22-4/lookup-table-lut.html.

Based on the truth table of the LUT's function http://www2.informatik.uni-freiburg.de/~feiten/teaching/floorplan_ex/tutorial_3.htm, with the LUT Equation !a & !d you'll get LUT Mask of 0000 0000 0101 0101 (0055).

Thanks,

Best Regards,

Sheng

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Hi Sheng,

Thanks for you reply ,

Now I'm understanding the mask formula .

But , the code was :

always @(posedge clk)

a_sam <= b && c;

Why do the equation defined as : !a & !d - I didnt write "not" to theses wires ?

In addition ,

Why Quartus use 2 LUT's to implement simple "AND" gate ? how does MUX beaviour ? What is the "select" value ?

Hi,

Check the links below where ALM operated in Normal Mode:

https://www.intel.com/content/www/us/en/docs/programmable/683775/current/normal-mode.html

https://www.intel.com/content/www/us/en/docs/programmable/683699/current/normal-mode.html

Note: The Quartus® Prime Pro Edition Compiler automatically selects the inputs to the LUT. ALMs in normal mode support register packing.

The LUT Equation also varies with MLAB cell location and device type.

Thanks,

Best Regards,

Sheng

Hi Yishay,

Top-up to the previous post, check this link https://www.intel.com/content/www/us/en/docs/programmable/683699/current/normal-mode.html:

Normal mode allows two functions to be implemented in one Intel® Stratix® 10 ALM, or a single function of up to six inputs. (Means combination of two LUTs or one LUT with 6 inputs)

The following figure (check the pic in the link) shows a combination of different input connections for the LUT mode.

The Intel® Quartus® Prime Compiler automatically searches for functions using common inputs or completely independent functions to be placed in one ALM to make efficient use of device resources. In addition, you can manually control resource use by setting location assignments.

Check this link https://www.intel.com/content/www/us/en/docs/programmable/683699/current/alm-output.html:

The following figure shows the Intel® Stratix® 10 ALM connectivity. In the Intel® Quartus® Prime Resource Property Editor, the entire ALM connection is simplified. Some routings will be routed internally by the Intel® Quartus® Prime software.

The "select" value is datae. These are so far I can find based on document.

Thanks,

Best Regards,

Sheng