LPDDR4 not available in NIOSV/g linker script - Agilex-5, Quartus 26.1 Pro

Hello,

I have a simple design for Agilex 5, using NIOS V/g and EMIF IP with LPDDR4 memory.

I have the NIOS V instruction and data manager ports connected to the EMIF IP. Design compiles Ok. But when I create a BSP, in the linker section, there is not a memory device for the LPDDR4.

In this thread, a similar problem seems to be mentioned - issue-with-bsp-creation-for-nios-vm-using-lpddr4-on-agilex-5-quartus-24-1--24-3

Does it mean that Address Span Extender IP must be used in order to have the LPDDR4 show in the linker script section, as an available memory device?