New Contributor
Regular ContributorHi yuriah726 ,
In the GTS SDI II IP User Guide, there is a set of parameters for "Transceiver reference clock frequency" and "Dynamic TX clock switching" under the category "Transceiver Options", however I don't see these parameters in Quartus. Is there somewhere else that I can enable this option to have the two different reference clock frequencies? Do I need this enabled, or is there some other way that I can switch between the two frequencies?
>> May I know which page / section you are looking for this information ?
>> Just trying to understand more so that we can speak apple to apple
Or do I need to provide both clock frequencies separately? If I need to provide both clock frequencies separately,
>> Altera recommends you not to share TX PLL reference clock with RX transceiver reference clock for a parallel loopback design because TX PLL clock is going to be tuned to match RX recovered clock frequency.
If I need to provide both clock frequencies separately, what pins can I use for the 148.35 MHz reference clock?
>> it depends on the device actually , but you can refer to our design example targeted the Agilex5 devkit, that can be a good reference to map the pin
>> Also you can refer to https://www.altera.com/design/devices/resources/pinouts#tab-blade-1-3
Regards,
Wincent_Altera
