Writing to EPCS device from Serial Flash Loader & SPI IP core

You can use your SPI core directly with the EPCS devices. You do not need to instantiate any Altera IP cores, just set the EPCS pins as "Use as regular I/O" using the Quartus GUI or using Tcl constraints, and then connect your SPI IP to those pins.

Cheers,

Dave

To supplement Daves answer, the purpose of the SFL core is only to give access for indirect JTAG programming of EPCS while the design is loaded. Alternatively the dedicated SFL image for the respective chip can be loaded to perform indirect JTAG programming.

Because the SFL IP connects to the EPCS pins, it has an option to multiplex them with other instances that want to acces it. Apparently you are using it now. As Dave clarified, you can access these pins exclusively if SFL isn't needed. In this case the EPCS pins have to be explicitely assigned in pin planner and the entity port, while they are connected implicitely by the SFL IP.

With or without SFL, you have to code the serial flash access in your design (or use ALTASMI_PARALLEL). If write doesn't work, I would assume that you're doing something wrong when talking to the flash.

--- Quote Start ---

You can use your SPI core directly with the EPCS devices. You do not need to instantiate any Altera IP cores, just set the EPCS pins as "Use as regular I/O" using the Quartus GUI or using Tcl constraints, and then connect your SPI IP to those pins.

Cheers,

Dave

--- Quote End ---

Thanks Dave,

But we already tried this approach and it did not work. We got errors (I can't remember right ATM but I think errors were during MAP or PAR).

I thought this altserial_flash_loader was specifically to grant access to the programming pins from within the running design, and use them as SPI.

Is there a reference design anywhere that shows that "use as regular I/O" working?

Thanks again for the reply.

--- Quote Start ---

Is there a reference design anywhere that shows that "use as regular I/O" working?

--- Quote End ---

I've tested this feature on a DE0-nano and it worked fine. I configured a JTAG-to-Avalon-MM master with PIO per the tutorial I wrote here:

http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

and then bit-banged a few SPI Flash transactions to read/write/program/erase the EPCS device on the DE0-nano. I have some Spansion SPI flash devices that I plan on testing, but haven't got around to that yet.

Try a simple test, where you select the pins as "Use as regular I/O" (that option is under Assignments->Device, Device and Pin Options, Dual-purpose pins), and then just assign static values to the outputs.

Make sure you get MISO and MOSI assigned correctly. I had them backwards the first time I did a design, and synthesis failed.

Cheers,

Dave

Thanks!!

This seems to be working now :)

--- Quote Start ---

This seems to be working now :)

--- Quote End ---

Excellent :)

Cheers,

Dave

--- Quote Start ---

Thanks!!

This seems to be working now :)

--- Quote End ---

Hi,

i have to do similiar thing in my fpga (Cyclone IV E).

I.E. i've made a SPI MASTER module in VHDL and now i want to use it to write to EPCS4 the configuration file (.sof).

I try to explain better:

now i program the fpga by using usb jtag cable and .jic file from quartus tool.

what i want:

.sof file ---> microcontroller ---> FPGA(SPI) ----> EPCS4

I hope this is clear.

micro is connetted to fpga by 16 I/O ports and not to epcs. The goal of the micro is to fill FPGA registers with binary format sof file. The only way to write the epcs is with the dedicated pins of fpga (Dclk, CS, ASDI, DATA).

I don't know where to start... :cry:

Could you help me? Could you explain me what kind of modules i have to implement? How could pass the sof file to epcs4 by SPI in binary format?

Thanks a lot.

--- Quote Start ---

I try to explain better:

now i program the fpga by using usb jtag cable and .jic file from quartus tool.

--- Quote End ---

Ok, so that provides a mechanism to program the EPCS device for the first time. This is required, since your microcontroller can only access the EPCS interface via the FPGA.

--- Quote Start ---

what i want:

.sof file ---> microcontroller ---> FPGA(SPI) ----> EPCS4

--- Quote End ---

If your microcontroller was connected to the FPGA via the microcontroller SPI port, then you could have connected the microcontroller SPI to the EPCS pins, and then just issued SPI commands.

--- Quote Start ---

micro is connetted to fpga by 16 I/O ports and not to epcs. The goal of the micro is to fill FPGA registers with binary format sof file. The only way to write the epcs is with the dedicated pins of fpga (Dclk, CS, ASDI, DATA).

I don't know where to start... :cry:

--- Quote End ---

You have several options;

1) Connect the EPCS pins to some of your 16 I/O ports and then bit-bang the SPI transactions.

2) Use the 16 I/O pins to create a bus interface to the FPGA. For example, create a microcontroller external bus to Avalon-MM master. You can then create a system in your FPGA with an Avalon-MM mapped slave for programming the EPCS device, eg., an SPI controller that connects to the EPCS device. Your microcontroller would then access registers in your FPGA system to program the EPCS device.

Option (1) is obviously the simplest.

Option (2) might make sense if the designer of the board had planned for the micrcontroller to access the FPGA as a memory mapped device, eg., the 16 I/O pins might be able to be configured as an 8-bit external bus with read/write controls and a wait-state handshake. Without knowing more about the design, its hard to say.

Bottom-line is that your microcontroller can program the EPCS device, but only after the FPGA has been configured from the EPCS. This means you probably want to look into having a "safe" image in the EPCS device that the microcontroller never overwrites. The remote update function can probably be used to implement the safe image.

Cheers,

Dave

I having the same problem. Im using Q13.1 with a 5CSEMA4 SOC. I boot via u-boot and download the fpga from the soc. I am trying to access the EPCS via the fpga to store parametric data. I'm trying to use the SFL. The compiler forces me to set "active serial" in the device settings. I cannot access epcs. As a simple test, I am just looking for my clock on the epcs (WO16) pin 16. But i see nothing. it is as if the interface is not connected.

myepcs: serialflash
    PORT map
    (
        asmi_access_granted    => '0',
        data_in    => "111" & ser_dout,
        data_oe => "1101",    
        dclk_in    => spi_clk,    
        ncso_in => ser_cs_n,
        noe_in    => '0', -- active low
--        asmi_access_request => 
        data_out=> epcs_dout
    );
ser_din <= epcs_dout(1);

Also. As sugested above I cannot change the EPCS pins to I/O as it says invaid assigment. Ideally, I would like to connect my spi driver directly to the epcs dedicated pins.