Writing to EPCS device from Serial Flash Loader & SPI IP core

To supplement Daves answer, the purpose of the SFL core is only to give access for indirect JTAG programming of EPCS while the design is loaded. Alternatively the dedicated SFL image for the respective chip can be loaded to perform indirect JTAG programming.

Because the SFL IP connects to the EPCS pins, it has an option to multiplex them with other instances that want to acces it. Apparently you are using it now. As Dave clarified, you can access these pins exclusively if SFL isn't needed. In this case the EPCS pins have to be explicitely assigned in pin planner and the entity port, while they are connected implicitely by the SFL IP.

With or without SFL, you have to code the serial flash access in your design (or use ALTASMI_PARALLEL). If write doesn't work, I would assume that you're doing something wrong when talking to the flash.