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Is there a reference design anywhere that shows that "use as regular I/O" working?
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I've tested this feature on a DE0-nano and it worked fine. I configured a JTAG-to-Avalon-MM master with PIO per the tutorial I wrote here:
http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial and then bit-banged a few SPI Flash transactions to read/write/program/erase the EPCS device on the DE0-nano. I have some Spansion SPI flash devices that I plan on testing, but haven't got around to that yet.
Try a simple test, where you select the pins as "Use as regular I/O" (that option is under Assignments->Device, Device and Pin Options, Dual-purpose pins), and then just assign static values to the outputs.
Make sure you get MISO and MOSI assigned correctly. I had them backwards the first time I did a design, and synthesis failed.
Cheers,
Dave
Honored Contributor
