Altera_Forum
Honored Contributor
15 years agoVCCIO and EPCS Issue
Hi, All
We are using EPCS and CycloneIII device. As EPCS can only support 3.3V, the IO pin connect seems must Power by 3.3V, which means VCCIO of Bank1 in FPGA must tie to 3.3V power. Then here comes the question. Some AS Mode relative pin such as MSEL is in bank6, which used to configure the programme mode. Is this bank6 must power 3.3V VCCIO too?