Honored ContributorHello,
In my design I configure a Cyclone FPGA with a EPCS1 memory in the Active Serial scheme. I would like to use the free space of the memory for the application. Is there any document that tells which addresses are unused? Thank you in advance.
Honored ContributorThe free space depends on the size of your design. There is no fixed free space, the free space is everything that is after the FPGA image. IF you don't use compression then this image has a fixed size (documented in the handbook) and if you use compression then you can assume it will be less, but there is no guarantee the size will be under any precise value.
Honored ContributorThank you for your reply Daixiwen,
I only have one more doubt (I hope): is the image written begining at lowest or highest byte addresses? Knowing this and the image fixed size I should know where is the free space.Honored ContributorThe FPGA image begins at address 0. If you use the programming files conversion tool (from Quartus' file menu) and generate a programming file for the EPCS1 from there it can generate a map file for you. It's a text file which says where all the flashed images are placed in the flash device. You can also use this tool to combine your FPGA image and your own custom data into a single programming file for the EPCS1.
Honored ContributorThank you very much, it's been very useful.
Honored ContributorHello again,
I have encountered another problem. In my circuit I wanted to use port 'Data0' (ECPS1's output) as an input to the FPGA to read the memory. When I try to assign an VHDL port to this pin Quartus Pin Planner gives me a message saying 'Value entered is not a valid location'. Is there any way to bypass this or is it impossible to use this pin for anything else but configuration?Honored ContributorYou need to change the setting for the dual-pin purposes.
Device->Device & pin options But you should use the ALTASMI_PARALLEL function to access the PROM instead.Honored ContributorThank you rbugalho, I'll give it a try.
Honored ContributorHello again.
First of all thank you rbugalho for your advice. I am now able to access the configuration flash from the FPGA without problems. I would like to preload the memory area that I am using in the application at programming time. Daixiwen mentioned a method to do so but I'm having problems to find a friendly manual or tutorial to learn how to do it. Do you know where can I find one? Or if it is not difficult to explain could you explain it for me? Thank you very muchHonored ContributorI don't know if there is any tutorial, but if you use the file conversion tool to create the flash image it will produce a map file. This is a text file that is easy to read to find out the addresses of the different parts of the flash memory.
Honored ContributorOk, I finally got it. The thing I was missing was how to create a .hex file with the Memory Editor (File->New File). I think I have all the tools I need for my application. Thank you all for your help
