Altera_Forum
Honored Contributor
16 years agotimescale related query ..
Can anyone explain why the simulator shows the following output for the below verilog code :
Output : run # 0x Thanks a ton in advance! ---------------------------- `timescale 10ns/ 1ns module toy ( a, sel, y ); input a,sel; output y; reg y; initial $monitor ( $time, y ); initial begin # 20 y = 1'b1; # 11.1 y = 1'b0 ; end endmodule