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Honored Contributor
13 years agoStratix V PLL question
Hello.
I am beginning to study Stratix V. My question concerns fPLLs of these ICs. Datasheet for Stratix V says: fractional plls may be individually configured for integer mode or fractional mode with third-order delta-sigma modulation. "Clock Networks and PLLs in Stratix V Devices" chapter has a picture of the PLL' structure that contains Delta Sigma Modulator on it. But there is no more information about this delta sigma modulator in any documentation. Can somebody say, what is the delta sigma modulator in Stratix V, and how has it to be used? any theoretical or practical information is required.