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Altera_Forum's avatar
Altera_Forum
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14 years ago

Stratix IV differential LVPECL Ibis model

Hi

i wanted to simulate a differential LVPECL output using ibis models. The models i've found only include LVPECL inputs, but the stratix 4 handbook says, that there are LVPECL outputs too:

--- Quote Start ---

In Stratix IV devices, the LVPECL I/O standard is supported on input clock pins on

column and row I/O banks. LVPECL output operation is not supported in Stratix IV

devices.

--- Quote End ---

So what model do I have to use?

Thanks for your help.

Thomas

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    not sure i follow, doesn't the last sentence say there aren't LVPECL outputs?

  • Altera_Forum's avatar
    Altera_Forum
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    I'm afraid your right...

    My problem is: I need a 4Gbps serial output and I don't know what I/O Standard on the Stratix 4 or Stratix 5 supports that. I read the sections in the handbooks but it didn't bring me forward.
  • Altera_Forum's avatar
    Altera_Forum
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    For this speed you need to read section about dedicated Gigabit transceivers.

  • Altera_Forum's avatar
    Altera_Forum
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    right, you'll need to use a high speed transceiver with PCML 1.4V or 1.5V