Stratix III Remote Update

Hi again Jake and all,

final questions:

I understand the the Remote Update scheme deals with selecting and reconfiguring the FPGA from different images/areas of the EPCS serial device. It's up to my design to look after recieving updates from my (remote) host and programming them into the EPCS

1. I'm assuming that both my Factory/fall-back image AND any application image I have will need to have the necessary functionally to recieve incoming data and program this data to the EPCS

2. Is there any foolproof mechanism to ensure that I don't inadvertently corrupt the Factory image and create a lockout situation (where the only remedy is to get the Byteblaster out)?

Many thanks,

Stephen

The NIOS Embedded Design Suite comes with an IDE (Eclipse) and it uses the GNU tool chain (so yes GCC compiler). You can install the Embedded Design Suite and start using it without buying the NIOS processor. You can also use the NIOS processor in OpenCore Eval mode if you wish.

Jake

Thanks for your very complete answer - very much apprecated.

Does the Nios kit include compiler etc. (which one GCC ?)

Stephen

Let me break this into two parts. I've used three methods for remotely updating FPGAs in the past:

1 - Use a configuration PROM which can be loaded via JTAG. This implies you have some JTAG controller in your remote system. Also, these PROM devices are not very large so really the don't accomodate Stratix III. This is passive serial or passive parallel mode.

2 - Use a CPLD in conjunction with a flash device. The CPLD handles reconfiguration of the FPGA (reads data from flash and programs FPGA). The FPGA is only responsible for requesting a reconfig from the CPLD. This mode is passive serial or passive parallel.

3 - Use a serial flash device and operate under Active Serial mode. This requires the FPGA itself to trigger and manage configurations. The only mechanism for doing this is with the Remote Update Controller as you stated.

To answer your question ... yes the remote update controller is easy enough to interface to that you could write some simple verilog or VHDL code to control it.

Now here is the second part:

How are you going to download a new FPGA image into the flash? This has nothing to do with the remote update controller. You need some way to write to the flash device. You have to answer this question no matter what configuration scheme you choose. I have done it three ways:

a - Wrote a verilog parallel flash controller to write data into the flash. The data was transferred to the board via USB. In this situation we were using a CPLD to program the FPGA from the flash in passive parallel mode.

b - Used a NIOS processor to write data into the parallel flash. Again using a CPLD to configure the FPGA. Here we transferred new configuration to the data via Ethernet.

c - Used a NIOS processor to write data into the EPCS serial flash device. Here we used Active Serial configuration mode in conjunction with the remote update controller. I've used both USB and Ethernet to transfer configuration data to the board under this scheme.

In SoPC builder, Altera provides an EPCS controller peripheral that can be used to interface to the flash. Now for everything I've done with it, I've used the NIOS processor. But you wouldn't have to. You could certainly write a little controller to manipulate that EPCS peripheral to program your data into the flash and not use a NIOS at all. Also, Altera provides the ALTASMI_PARALLEL megafunction for programming the EPCS device. Those are the two directions I would point you in.

http://www.altera.com/literature/ug/mfug_asmi.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=altasmi_parallel

You can certainly do everything you need to do without a NIOS. Now when it comes to the NIOS, I'm a big proponent. You'll never get so much use out of so few logic resources as you will out of an embedded processor. I believe the price tag on the NIOS is $500.00. However, I'd just twist your sales rep's arm until he gives it to you for free.

Hi again Jake,

For the SIII device - in Chapter 11 Configuring SIII Devices doc table 11-2 (Note1) and table 11-3 show Fast AS as the only method available under the Remote System Update scheme, so yes with this arrangement I wouldn't need an external controller (which is what I want).

I read the thread you contributed to here:http://www.alteraforum.com/forum/showthread.php?t=5280&highlight=remote+upgrade+stratix+iii

The Remote Update Scheme seems to allow the overall hardware and functionality that I would like but I don't want to use a Nios processor - is it relatively easy to have a state machine take the place of the Nios - I see an example (not yours Jake, another one. I think yours may use Nios but I could be wrong) in the shared material section but I havn't looked at it yet.

stephen

Stephen,

So from what you are describing it sounds like you are wanting to use the Active Serial configuration scheme. You will have no external controller that configures the FPGA passively. Is this correct?

Jake