Altera_Forum
Honored Contributor
10 years agoSignal distortion ADC/DAC on Cyclone III dev kit
Hi All,
I'm new to FPGA's, and have been having difficulty doing basic signal I/O. I modified the factory example that came with the Cyclone III software (see attachment for block diagrams). This should allow me to pass a signal from the ADC to the DAC. However, the signal I receive from the DAC (which is 50 Ohm terminated) is incredibly noisy and distorted. The only conclusion I can come to after many weeks of documentation-reading is that the clock settings are incorrectly configured. Does anyone have any advice? ** I apologize for any lack of clarity, I've only just started FPGA's and need to use them in a research setting. System Specs: Boad: Cyclone III EP3C120F780 Software Version: Quartus II, 13.1 64-bit Cheers, Chris