Remote update Flash EPROM (EPCS16) using lan/ uart

Hi Jan:

First a question:

Is the ethernet controlled through the FPGA, or do you have a cpu with Ethernet on the board? The main concern here, is I want to know where the image is store in after it comes off the ethernet.

There are a few ways this can be accomplished:

One is through a uart slave core in the fpga that talks to ALTREMOTE_UPDATE megafuncton in the FPGA to write, verify and boot a secondary image in the EPCS.

We have done it that way with success, but we wrote our own custom uart interface, with slip streaming, and addressing scheme to make it work. This is the best way, if you only have a uart interface, and no direct micro or cpu on the board.

The second way is to wire up the EPCS directly to both the CPU and FPGA, so the FPGA can boot from this in active serial mode, then the CPU can take control and access the EPCS directly. This is a little more risky, in that at boot up, you must insure the FPGA can read from the EPCS as it expects. We have done this when we had a small micro on the design that didn't have it's own external flash memory to store the bitfile. I don't really like this method however.

A third way, if your CPU doesn't require the FPGA as part of it's boot process, is to have the CPU program the FPGA at each boot up in passive serial mode. This way the image is stored in the CPU's flash memory. We tend to use this most often if there is a master CPU in the design outside of the FPGA.

I work for INFINETIX, an engineering consultant group. If you are working for a company with specific needs we can help you out. www.infinetix.com.

If you are a student, working on a project, keep asking specific questions as you go along and get stuck, people on the forums are pretty good.

Pete

Hi Pete,

thank you for your answer.

I dont control ethernet through FPGA or cpu, I use the Xport

http://www.lantronix.com/device-networking/embedded-device-servers/xport.html

which can convert uart <-> ethernet and FPGA control (read/write) the uart.

The second and third way we used in last time and it work but it seems complicated.

The first way could be the best way. But i must study ALTREMOTE_UPDATE megafunction, how it works.

Jan

Hi Jan:

Yes, I've very familiar with the Lantronix devices. We did several designs with the Xport-AR several years ago. And are currently supporting them and some successors with newer Xport devices.

I agree with this setup the UART interface would be the best.

http://www.altera.com/literature/ug/ug_altremote.pdf is the userguide for the megafunction.

One issue we ran into is the simulation model of the megafunction is non-existant, so we did use signal tap to make sure it was working correctly.

In our design the UART communications and register interface to talk to the megafunction was all custom logic.. We did slip streaming with parity and CRC error detection, to make sure it was programmed with valid data.

The use case for this, is you still need to initially program the EPCS with a initial bitfile that has the REMOTE_UPGRADE megafuction. But this allows you to write a secondary image and switch over to that secondary image with a fall back to the initial image if it failes.

It works well, and the fall back is nice. Basically we had the master system do a version check on the bitfile, if it didn't match what was expected it would try the secondary bit file and check versions again. If it fell back to the first bitfile, or the version still did not match, it would program the new bitfile into the secondary space, and try the switchover again.

Pete

Hi,

i am back to solve remote update and i have question - how can i start to reconfigure fpga ? In remote_upgrade megafunction is described some registers, but the exact way how to start reconfiguration without external pin nConfig or nStatus i didnt find.

Is some way how to reconfigurate fpga without remote_upgrade megafunction and without external pins ?

Thank you for answer.

Jan

--- Quote Start ---

Is some way how to reconfigurate fpga without remote_upgrade megafunction and without external pins ?

--- Quote End ---

Why don't you want to use the remote_upgrade megafunction? What you need is a minimal interface to the remote upgrade megafunction, needing just a single register of your application and the rem_update block existing in the FPGA hardware.

rem_update_inst : rem_update PORT MAP (
  clock	 => CLK,
  reset	 => RESET,
  reconfig	 => reconfig_req
);

The reconfig does what the signal name says, start a reconfiguration.

Without setting additional registers in the remote_upgrade block, the effect is similar to asserting NCONFIG.

Just try...

It is not so simple how you write or i have some error on my design or program. I have design, where i have altremote_update0 megafunction connect to NIOS2/f to LED_BASE led[15] to reconfig pin and led[14] to reset pin and i have this part of program:

-----------------------------------

printf("Restart altremote_update.\n");

IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE,0x4000);

usleep(10000);

IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE,0x0);

// open flash

printf("Oteviram flash EPROM.\n");

fd = alt_flash_open_dev("/dev/epcs_flash_controller_0");

if (fd!=NULL)

{

printf("Info flash EPROM.\n");

ret_code = alt_get_flash_info(fd, &regions, &number_of_regions);

if (!ret_code)

{

printf("Flash EPROM obsahuje %d sektoru.\n", regions->number_of_blocks);

for(n=0;n<regions->number_of_blocks;n++)

{ printf("Erase %d.sector.\n",n);

if (fd!=NULL) alt_erase_flash_block(fd, n*65536, 65536);

}

printf("Wait on data in UART.\n");

}

}

init_uarts();

// main cycle

while (1)

{

// write uarts data to flash eprom

if (rx_lan_flag1==1)

{ alt_printf("%x ",blok_cnt);

// reverzuj bity

ReverseBitsInBytes(data_written, 256);

// write block

if (fd!=NULL) ret_code = alt_write_flash_block(fd, 0, blok_cnt*256, data_written, 256);

rx_lan1=0;

rx_lan_flag1=0;

blok_cnt++;

}

// read data

if (blok_cnt==16*256)

{ printf("Reading flash EPROM.\n");

for(m=0;m<blok_cnt;m++)

{ ret_code = alt_read_flash(fd, m*256, data_read, 256);

// reverzuj bity

ReverseBitsInBytes(data_read, 256);

// list only 16 bytes from 256-bytes block

printf("%04X:",m);

for(n=0;n<16;n++)

{ printf("%02X",data_read[n]);

}

printf("\n");

}

printf("Close flash EPROM.\n");

alt_flash_close_dev(fd);

blok_cnt=0;

printf("Perform reconfiguration - write 1 to config.pin.\n");

IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE,0x8000);

usleep(10000);

IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE,0x0);

}

------------------------------

Everything is ok, but reconfiguration does not start after

IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE,0x8000);

usleep(10000);

IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE,0x0);

When i turn off and turn on power supply of the board, it takes the bitstream which i programed to flash and it work well.

Is possible to set some registers on altremote megafunction or something else ?

Clock for NIOS is 120MHz and for altremote megafunction 20MHz. In NIOS is not any timer ...

Thank you for your answer.

Jan

No idea why the configuration request isn't working.

You should check in the technology mapper view how the reconfic signal is actually connected.

You also must select Configuration Mode = Remote under Assignments/Device/Device and Pin Options/Configuration/

(set_global_assignment -name STRATIXIII_UPDATE_MODE REMOTE).

Yes, i select Configuration Mode = Remote, i use 10MHz clock for altremote megafunction, the last what i find, that we have nConfig external connect to with pull-up 10k to VCC 3,3V.

We use EP3C25E144.